Commit Graph

470 Commits

Author SHA1 Message Date
MerryMage
578e5881cc ARM_Disasm: Disassemble BLX 2016-04-06 20:34:33 +01:00
MerryMage
9874fae84b fixup! Addressed comments regarding JitX64::JitX64 2016-04-06 20:34:33 +01:00
MerryMage
25201712db fixup! JitX64/RegAlloc: Rename member functions to (Lock|Bind)ArmFor(Read|ReadWrite|Write). 2016-04-06 20:34:33 +01:00
MerryMage
67ed95cb7d tests/JitX64: Add tests for testing data processing instructions with Rd=R15 2016-04-06 20:34:33 +01:00
MerryMage
550fef508e JitX64/RegAlloc: Improve documentation and improve method names 2016-04-06 20:34:33 +01:00
MerryMage
26c18cc21e fixup! Fix bugs in thumb decoder & have it use boost::optional 2016-04-06 20:34:33 +01:00
MerryMage
e86f27ad72 fixup! Builds on OS X now 2016-04-06 20:34:33 +01:00
MerryMage
486d14b7d8 fixup! Arm/ArmDecoder: Address comments regarding the arm decoder and check versions of all arm instructions 2016-04-06 20:34:33 +01:00
MerryMage
52558ae8be JitX64: Implement immediate data processing instructions 2016-04-06 20:34:33 +01:00
MerryMage
a80f9d8a66 JitX64: Implement ADC_imm 2016-04-06 20:34:33 +01:00
MerryMage
5331b7c4a5 JitX64: Implement ARM_Jit::ClearCache() 2016-04-06 20:34:33 +01:00
MerryMage
02c3484dbc tests/JitX64: Fuzz ARM data processing instructions 2016-04-06 20:34:33 +01:00
MerryMage
91152ad2b2 dyncom: Implement Arm_DynCom::ClearCache() 2016-04-06 20:34:33 +01:00
MerryMage
25dfc94cb4 JitX64: Implement ARM_Jit
ARM_Jit is the ARM_Interface for the x64 recompiler.
2016-04-06 20:33:08 +01:00
MerryMage
4f012099a0 JitX64: Add accessors for ARMul_State::exclusive_tag and ARMul_State::exclusive_state 2016-04-06 20:33:08 +01:00
MerryMage
b9a852b048 JitX64: Initial implementation of JitX64 compiler 2016-04-06 20:33:08 +01:00
MerryMage
e34c66d62b JitX64: Implement register allocator 2016-04-06 20:33:08 +01:00
MerryMage
a8dec47797 ARM/Decoder: Initial implementation 2016-04-06 20:33:08 +01:00
Mathew Maidment
aa6380e5bc Merge pull request #1643 from MerryMage/make_unique
Common: Remove Common::make_unique, use std::make_unique
2016-04-05 20:10:11 -04:00
MerryMage
a06dcfeb61 Common: Remove Common::make_unique, use std::make_unique 2016-04-05 13:31:17 +01:00
Mathew Maidment
80c16961ae Merge pull request #1618 from MerryMage/one-step
Prevent cache overflow when single stepping
2016-03-31 11:00:42 -04:00
MerryMage
cbba0bec7c DynCom: Optimize single stepping 2016-03-30 18:57:59 +01:00
Lioncash
d53c9cde1a armstate: Correct FIQ register banking
FIQ has seven banked registers (R8 to R14), not two.
2016-03-21 18:56:27 -04:00
rob turner
d29578d467 ARM_Disasm::DisassembleMemHalf: actually use width in determining opcode name 2016-01-19 18:42:16 +01:00
Lioncash
532dc797c9 arm_dyncom_dec: Fix decoding of VMLS
Previously, all VMLS variants would misdecode as CDP
(which isn't necessarily wrong in itself, however
VMLS has it's own label of execution)
2015-12-30 14:23:07 -05:00
Lioncash
fddfe946c8 dyncom: Handle modifying the APSR via an MRC instruction 2015-12-28 07:52:04 -05:00
Lioncash
d09b7a3c12 dyncom: Remove PC dispatch from several instructions
These instructions aren't capable of using the PC as a destination
2015-12-20 21:19:02 -05:00
Lioncash
5a531d7ec2 dyncom: Handle unprivileged load/store variants correctly
LDRT/LDRBT/STRBT/STRT should simulate the load or store
as if the host CPU is in user mode.

STRT is also allowed to use the PC as an operand
2015-12-19 19:05:50 -05:00
Lioncash
56e22e6aac dyncom: Remove static keyword from header functions 2015-12-06 15:14:51 -05:00
Lioncash
1ea0702eaa arm_interface: Make GetNumInstructions const 2015-12-06 15:07:59 -05:00
Lioncash
de9a625c7e arm_interface: directly initialize class members 2015-12-06 15:07:00 -05:00
Lioncash
d03e7f08ff dyncom: const correctness changes 2015-12-06 15:03:06 -05:00
Lioncash
5e2b66d2a4 armstate: Zero out the registers on creation
std::array isn't always guaranteed to explicitly zero out it's contents
without an initializer list.
2015-11-29 15:16:34 -05:00
bunnei
43bb29edc5 Merge pull request #1122 from polaris-/gdbstub
gdbstub implementation
2015-11-11 23:21:31 -05:00
polaris-
2b7316a379 Remove unnecessary new lines, changed Deinit to Shutdown 2015-10-11 20:07:58 -04:00
Emmanuel Gil Peyrot
14af5919ba CitraQt, SkyEye, Loader, VideoCore: Remove newlines in LOG_* calls.
The LOG_* function itself already appends one.
2015-10-09 22:14:56 +01:00
polaris-
42928659e8 Use BreakpointAddress struct instead of passing address directly 2015-10-04 11:22:31 -04:00
polaris-
31dee93e84 Implement gdbstub 2015-10-04 11:16:59 -04:00
Lioncash
751fbfdcc3 general: Silence some warnings when using clang 2015-09-16 08:51:53 -04:00
Lioncash
60b3fc01a2 General: Replace NULL and '0' usages with nullptr where applicable 2015-09-11 14:59:49 -04:00
archshift
9e8383e296 DynCom: Converted all 0xE condition code checks to ConditionCode::AL 2015-09-05 22:24:42 -07:00
Lioncash
dc1b024b80 dyncom: Simplify some comparisons in CondPassed 2015-08-26 00:10:23 -04:00
Lioncash
01dd833ffa dyncom: Change return type of CondPassed to bool 2015-08-25 23:59:01 -04:00
Yuri Kunde Schlesner
0fcabd2b11 Integrate the MicroProfile profiling library
This brings goodies such as a configurable user interface and
multi-threaded timeline view.
2015-08-24 22:16:28 -03:00
Yuri Kunde Schlesner
3efb205a68 Merge pull request #1025 from yuriks/heap-management
Kernel: Correct(er) handling of Heap and Linear Heap allocations
2015-08-22 14:01:57 -07:00
Yuri Kunde Schlesner
e2c7954be5 Memory: Move address type conversion routines to memory.cpp/h
These helpers aren't really part of the kernel, and mem_map.cpp/h is
going to be moved there next.
2015-08-16 01:03:46 -03:00
Lioncash
46b0277cbf vfp: use std::swap where applicable 2015-08-15 19:08:51 -04:00
bunnei
cebf245504 Merge pull request #1027 from lioncash/debugger
debugger: Add the ability to view VFP register contents
2015-08-13 18:13:25 -04:00
Emmanuel Gil Peyrot
5115d0177e ARM Core, Video Core, CitraQt, Citrace: Use CommonTypes types instead of the standard u?int*_t types. 2015-08-11 22:38:44 +01:00
aroulin
38c87733d9 arm_disasm: ARMv6 mul/div and abs media instructions
SMLAD, SMUAD, SMLSD, SMUSD, SMLALD, SMLSLD,
SMMLA, SMMUL, SMMLS
USAD8, USADA8
2015-08-11 12:48:28 +02:00