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vk_shader_decompiler: Use registry for specialization
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8e9f23f393
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@ -273,9 +273,9 @@ VKComputePipeline& VKPipelineCache::GetComputePipeline(const ComputePipelineCach
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specialization.workgroup_size = key.workgroup_size;
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specialization.shared_memory_size = key.shared_memory_size;
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const SPIRVShader spirv_shader{
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Decompile(device, shader->GetIR(), ShaderType::Compute, specialization),
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shader->GetEntries()};
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const SPIRVShader spirv_shader{Decompile(device, shader->GetIR(), ShaderType::Compute,
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shader->GetRegistry(), specialization),
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shader->GetEntries()};
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entry = std::make_unique<VKComputePipeline>(device, scheduler, descriptor_pool,
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update_descriptor_queue, spirv_shader);
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return *entry;
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@ -324,8 +324,7 @@ VKPipelineCache::DecompileShaders(const GraphicsPipelineCacheKey& key) {
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const auto& gpu = system.GPU().Maxwell3D();
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Specialization specialization;
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specialization.primitive_topology = fixed_state.input_assembly.topology;
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if (specialization.primitive_topology == Maxwell::PrimitiveTopology::Points) {
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if (fixed_state.input_assembly.topology == Maxwell::PrimitiveTopology::Points) {
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ASSERT(fixed_state.input_assembly.point_size != 0.0f);
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specialization.point_size = fixed_state.input_assembly.point_size;
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}
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@ -333,9 +332,6 @@ VKPipelineCache::DecompileShaders(const GraphicsPipelineCacheKey& key) {
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specialization.attribute_types[i] = fixed_state.vertex_input.attributes[i].type;
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}
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specialization.ndc_minus_one_to_one = fixed_state.rasterizer.ndc_minus_one_to_one;
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specialization.tessellation.primitive = fixed_state.tessellation.primitive;
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specialization.tessellation.spacing = fixed_state.tessellation.spacing;
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specialization.tessellation.clockwise = fixed_state.tessellation.clockwise;
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SPIRVProgram program;
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std::vector<vk::DescriptorSetLayoutBinding> bindings;
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@ -356,8 +352,9 @@ VKPipelineCache::DecompileShaders(const GraphicsPipelineCacheKey& key) {
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const std::size_t stage = index == 0 ? 0 : index - 1; // Stage indices are 0 - 5
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const auto program_type = GetShaderType(program_enum);
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const auto& entries = shader->GetEntries();
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program[stage] = {Decompile(device, shader->GetIR(), program_type, specialization),
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entries};
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program[stage] = {
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Decompile(device, shader->GetIR(), program_type, shader->GetRegistry(), specialization),
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entries};
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if (program_enum == Maxwell::ShaderProgram::VertexA) {
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// VertexB was combined with VertexA, so we skip the VertexB iteration
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@ -132,6 +132,10 @@ public:
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return shader_ir;
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}
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const VideoCommon::Shader::Registry& GetRegistry() const {
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return registry;
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}
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const VideoCommon::Shader::ShaderIR& GetIR() const {
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return shader_ir;
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}
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@ -24,6 +24,7 @@
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#include "video_core/renderer_vulkan/vk_shader_decompiler.h"
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#include "video_core/shader/node.h"
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#include "video_core/shader/shader_ir.h"
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#include "video_core/shader/transform_feedback.h"
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namespace Vulkan {
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@ -266,9 +267,10 @@ bool IsPrecise(Operation operand) {
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class SPIRVDecompiler final : public Sirit::Module {
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public:
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explicit SPIRVDecompiler(const VKDevice& device, const ShaderIR& ir, ShaderType stage,
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const Specialization& specialization)
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const Registry& registry, const Specialization& specialization)
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: Module(0x00010300), device{device}, ir{ir}, stage{stage}, header{ir.GetHeader()},
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specialization{specialization} {
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registry{registry}, specialization{specialization},
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transform_feedback{BuildTransformFeedback(registry.GetGraphicsInfo())} {
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AddCapability(spv::Capability::Shader);
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AddCapability(spv::Capability::UniformAndStorageBuffer16BitAccess);
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AddCapability(spv::Capability::ImageQuery);
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@ -318,25 +320,29 @@ public:
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AddExecutionMode(main, spv::ExecutionMode::OutputVertices,
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header.common2.threads_per_input_primitive);
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break;
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case ShaderType::TesselationEval:
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case ShaderType::TesselationEval: {
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const auto& info = registry.GetGraphicsInfo();
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AddCapability(spv::Capability::Tessellation);
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AddEntryPoint(spv::ExecutionModel::TessellationEvaluation, main, "main", interfaces);
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AddExecutionMode(main, GetExecutionMode(specialization.tessellation.primitive));
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AddExecutionMode(main, GetExecutionMode(specialization.tessellation.spacing));
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AddExecutionMode(main, specialization.tessellation.clockwise
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AddExecutionMode(main, GetExecutionMode(info.tessellation_primitive));
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AddExecutionMode(main, GetExecutionMode(info.tessellation_spacing));
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AddExecutionMode(main, info.tessellation_clockwise
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? spv::ExecutionMode::VertexOrderCw
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: spv::ExecutionMode::VertexOrderCcw);
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break;
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case ShaderType::Geometry:
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}
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case ShaderType::Geometry: {
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const auto& info = registry.GetGraphicsInfo();
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AddCapability(spv::Capability::Geometry);
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AddEntryPoint(spv::ExecutionModel::Geometry, main, "main", interfaces);
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AddExecutionMode(main, GetExecutionMode(specialization.primitive_topology));
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AddExecutionMode(main, GetExecutionMode(info.primitive_topology));
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AddExecutionMode(main, GetExecutionMode(header.common3.output_topology));
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AddExecutionMode(main, spv::ExecutionMode::OutputVertices,
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header.common4.max_output_vertices);
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// TODO(Rodrigo): Where can we get this info from?
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AddExecutionMode(main, spv::ExecutionMode::Invocations, 1U);
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break;
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}
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case ShaderType::Fragment:
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AddEntryPoint(spv::ExecutionModel::Fragment, main, "main", interfaces);
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AddExecutionMode(main, spv::ExecutionMode::OriginUpperLeft);
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@ -545,7 +551,8 @@ private:
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if (stage != ShaderType::Geometry) {
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return;
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}
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const u32 num_input = GetNumPrimitiveTopologyVertices(specialization.primitive_topology);
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const auto& info = registry.GetGraphicsInfo();
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const u32 num_input = GetNumPrimitiveTopologyVertices(info.primitive_topology);
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DeclareInputVertexArray(num_input);
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DeclareOutputVertex();
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}
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@ -898,7 +905,7 @@ private:
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u32 GetNumInputVertices() const {
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switch (stage) {
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case ShaderType::Geometry:
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return GetNumPrimitiveTopologyVertices(specialization.primitive_topology);
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return GetNumPrimitiveTopologyVertices(registry.GetGraphicsInfo().primitive_topology);
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case ShaderType::TesselationControl:
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case ShaderType::TesselationEval:
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return NumInputPatches;
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@ -2495,7 +2502,9 @@ private:
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const ShaderIR& ir;
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const ShaderType stage;
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const Tegra::Shader::Header header;
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const Registry& registry;
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const Specialization& specialization;
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const std::unordered_map<u8, VaryingTFB> transform_feedback;
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const Id t_void = Name(TypeVoid(), "void");
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@ -2870,8 +2879,9 @@ ShaderEntries GenerateShaderEntries(const VideoCommon::Shader::ShaderIR& ir) {
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}
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std::vector<u32> Decompile(const VKDevice& device, const VideoCommon::Shader::ShaderIR& ir,
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ShaderType stage, const Specialization& specialization) {
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return SPIRVDecompiler(device, ir, stage, specialization).Assemble();
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ShaderType stage, const VideoCommon::Shader::Registry& registry,
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const Specialization& specialization) {
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return SPIRVDecompiler(device, ir, stage, registry, specialization).Assemble();
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}
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} // namespace Vulkan
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@ -15,6 +15,7 @@
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#include "common/common_types.h"
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#include "video_core/engines/maxwell_3d.h"
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#include "video_core/engines/shader_type.h"
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#include "video_core/shader/registry.h"
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#include "video_core/shader/shader_ir.h"
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namespace Vulkan {
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@ -91,17 +92,9 @@ struct Specialization final {
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u32 shared_memory_size{};
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// Graphics specific
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Maxwell::PrimitiveTopology primitive_topology{};
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std::optional<float> point_size{};
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std::array<Maxwell::VertexAttribute::Type, Maxwell::NumVertexAttributes> attribute_types{};
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bool ndc_minus_one_to_one{};
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// Tessellation specific
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struct {
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Maxwell::TessellationPrimitive primitive{};
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Maxwell::TessellationSpacing spacing{};
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bool clockwise{};
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} tessellation;
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};
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// Old gcc versions don't consider this trivially copyable.
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// static_assert(std::is_trivially_copyable_v<Specialization>);
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@ -114,6 +107,8 @@ struct SPIRVShader {
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ShaderEntries GenerateShaderEntries(const VideoCommon::Shader::ShaderIR& ir);
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std::vector<u32> Decompile(const VKDevice& device, const VideoCommon::Shader::ShaderIR& ir,
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Tegra::Engines::ShaderType stage, const Specialization& specialization);
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Tegra::Engines::ShaderType stage,
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const VideoCommon::Shader::Registry& registry,
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const Specialization& specialization);
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} // namespace Vulkan
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