2018-03-18 20:15:05 +00:00
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// Copyright 2018 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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2018-08-10 22:39:37 +00:00
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#include "common/assert.h"
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2018-11-24 04:20:56 +00:00
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#include "common/microprofile.h"
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2018-03-18 20:15:05 +00:00
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#include "video_core/engines/fermi_2d.h"
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2018-09-08 20:58:20 +00:00
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#include "video_core/engines/kepler_memory.h"
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2018-03-18 20:15:05 +00:00
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#include "video_core/engines/maxwell_3d.h"
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#include "video_core/engines/maxwell_compute.h"
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2018-06-10 22:02:33 +00:00
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#include "video_core/engines/maxwell_dma.h"
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2018-03-18 20:15:05 +00:00
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#include "video_core/gpu.h"
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2018-08-03 16:55:58 +00:00
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#include "video_core/rasterizer_interface.h"
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2018-03-18 20:15:05 +00:00
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namespace Tegra {
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2018-08-10 22:39:37 +00:00
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u32 FramebufferConfig::BytesPerPixel(PixelFormat format) {
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switch (format) {
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case PixelFormat::ABGR8:
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return 4;
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2018-11-21 01:27:34 +00:00
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default:
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return 4;
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2018-08-10 22:39:37 +00:00
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}
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UNREACHABLE();
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}
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2018-08-03 16:55:58 +00:00
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GPU::GPU(VideoCore::RasterizerInterface& rasterizer) {
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2018-08-28 14:57:56 +00:00
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memory_manager = std::make_unique<Tegra::MemoryManager>();
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2018-11-24 04:20:56 +00:00
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dma_pusher = std::make_unique<Tegra::DmaPusher>(*this);
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2018-08-03 16:55:58 +00:00
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maxwell_3d = std::make_unique<Engines::Maxwell3D>(rasterizer, *memory_manager);
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2018-10-06 03:46:40 +00:00
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fermi_2d = std::make_unique<Engines::Fermi2D>(rasterizer, *memory_manager);
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2018-03-18 20:15:05 +00:00
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maxwell_compute = std::make_unique<Engines::MaxwellCompute>();
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2018-10-18 01:29:10 +00:00
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maxwell_dma = std::make_unique<Engines::MaxwellDMA>(rasterizer, *memory_manager);
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2018-10-18 00:44:07 +00:00
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kepler_memory = std::make_unique<Engines::KeplerMemory>(rasterizer, *memory_manager);
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2018-03-18 20:15:05 +00:00
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}
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GPU::~GPU() = default;
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2018-08-28 14:57:56 +00:00
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Engines::Maxwell3D& GPU::Maxwell3D() {
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2018-07-20 22:31:36 +00:00
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return *maxwell_3d;
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}
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2018-08-28 14:57:56 +00:00
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const Engines::Maxwell3D& GPU::Maxwell3D() const {
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2018-03-22 20:19:35 +00:00
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return *maxwell_3d;
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}
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2018-08-28 14:57:56 +00:00
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MemoryManager& GPU::MemoryManager() {
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return *memory_manager;
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}
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const MemoryManager& GPU::MemoryManager() const {
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return *memory_manager;
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}
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2018-11-24 04:20:56 +00:00
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DmaPusher& GPU::DmaPusher() {
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return *dma_pusher;
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}
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const DmaPusher& GPU::DmaPusher() const {
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return *dma_pusher;
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}
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2018-04-25 02:57:10 +00:00
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u32 RenderTargetBytesPerPixel(RenderTargetFormat format) {
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ASSERT(format != RenderTargetFormat::NONE);
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switch (format) {
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2018-06-06 02:07:40 +00:00
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case RenderTargetFormat::RGBA32_FLOAT:
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2018-08-11 18:01:50 +00:00
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case RenderTargetFormat::RGBA32_UINT:
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2018-06-06 02:07:40 +00:00
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return 16;
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2018-08-13 04:04:52 +00:00
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case RenderTargetFormat::RGBA16_UINT:
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2018-08-13 04:34:20 +00:00
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case RenderTargetFormat::RGBA16_UNORM:
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2018-06-06 03:01:20 +00:00
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case RenderTargetFormat::RGBA16_FLOAT:
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2018-07-23 23:10:00 +00:00
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case RenderTargetFormat::RG32_FLOAT:
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2018-08-13 12:55:16 +00:00
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case RenderTargetFormat::RG32_UINT:
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2018-06-06 03:01:20 +00:00
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return 8;
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2018-04-25 02:57:10 +00:00
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case RenderTargetFormat::RGBA8_UNORM:
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2018-08-10 15:44:43 +00:00
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case RenderTargetFormat::RGBA8_SNORM:
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2018-08-11 18:01:50 +00:00
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case RenderTargetFormat::RGBA8_SRGB:
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2018-08-20 12:26:54 +00:00
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case RenderTargetFormat::RGBA8_UINT:
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2018-04-25 02:57:10 +00:00
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case RenderTargetFormat::RGB10_A2_UNORM:
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2018-07-23 20:56:52 +00:00
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case RenderTargetFormat::BGRA8_UNORM:
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2018-09-10 03:41:37 +00:00
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case RenderTargetFormat::BGRA8_SRGB:
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2018-08-11 18:01:50 +00:00
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case RenderTargetFormat::RG16_UNORM:
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case RenderTargetFormat::RG16_SNORM:
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case RenderTargetFormat::RG16_UINT:
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case RenderTargetFormat::RG16_SINT:
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case RenderTargetFormat::RG16_FLOAT:
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2018-08-01 13:31:42 +00:00
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case RenderTargetFormat::R32_FLOAT:
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2018-08-08 06:40:04 +00:00
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case RenderTargetFormat::R11G11B10_FLOAT:
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2018-08-13 12:55:16 +00:00
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case RenderTargetFormat::R32_UINT:
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2018-04-25 02:57:10 +00:00
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return 4;
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2018-08-11 18:01:50 +00:00
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case RenderTargetFormat::R16_UNORM:
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case RenderTargetFormat::R16_SNORM:
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case RenderTargetFormat::R16_UINT:
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case RenderTargetFormat::R16_SINT:
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case RenderTargetFormat::R16_FLOAT:
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2018-08-13 03:02:34 +00:00
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case RenderTargetFormat::RG8_UNORM:
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2018-08-10 16:07:37 +00:00
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case RenderTargetFormat::RG8_SNORM:
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2018-08-11 18:01:50 +00:00
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return 2;
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case RenderTargetFormat::R8_UNORM:
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2018-08-12 01:44:42 +00:00
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case RenderTargetFormat::R8_UINT:
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2018-08-11 18:01:50 +00:00
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return 1;
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2018-04-25 02:57:10 +00:00
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default:
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2018-04-27 11:54:05 +00:00
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UNIMPLEMENTED_MSG("Unimplemented render target format {}", static_cast<u32>(format));
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2018-04-25 02:57:10 +00:00
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}
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}
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2018-08-11 18:01:50 +00:00
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u32 DepthFormatBytesPerPixel(DepthFormat format) {
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switch (format) {
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case DepthFormat::Z32_S8_X24_FLOAT:
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return 8;
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case DepthFormat::Z32_FLOAT:
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case DepthFormat::S8_Z24_UNORM:
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case DepthFormat::Z24_X8_UNORM:
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case DepthFormat::Z24_S8_UNORM:
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case DepthFormat::Z24_C8_UNORM:
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return 4;
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case DepthFormat::Z16_UNORM:
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return 2;
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default:
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UNIMPLEMENTED_MSG("Unimplemented Depth format {}", static_cast<u32>(format));
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}
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}
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2018-11-24 04:20:56 +00:00
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enum class BufferMethods {
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BindObject = 0,
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CountBufferMethods = 0x40,
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};
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MICROPROFILE_DEFINE(ProcessCommandLists, "GPU", "Execute command buffer", MP_RGB(128, 128, 192));
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void GPU::CallMethod(const MethodCall& method_call) {
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MICROPROFILE_SCOPE(ProcessCommandLists);
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LOG_TRACE(HW_GPU,
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"Processing method {:08X} on subchannel {} value "
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"{:08X} remaining params {}",
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MethCall.method, MethCall.subchannel, value, remaining_params);
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ASSERT(method_call.subchannel < bound_engines.size());
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if (method_call.method == static_cast<u32>(BufferMethods::BindObject)) {
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// Bind the current subchannel to the desired engine id.
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LOG_DEBUG(HW_GPU, "Binding subchannel {} to engine {}", method_call.subchannel,
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method_call.argument);
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bound_engines[method_call.subchannel] = static_cast<EngineID>(method_call.argument);
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return;
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}
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const EngineID engine = bound_engines[method_call.subchannel];
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switch (engine) {
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case EngineID::FERMI_TWOD_A:
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fermi_2d->CallMethod(method_call);
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break;
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case EngineID::MAXWELL_B:
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maxwell_3d->CallMethod(method_call);
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break;
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case EngineID::MAXWELL_COMPUTE_B:
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maxwell_compute->CallMethod(method_call);
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break;
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case EngineID::MAXWELL_DMA_COPY_A:
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maxwell_dma->CallMethod(method_call);
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break;
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case EngineID::KEPLER_INLINE_TO_MEMORY_B:
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kepler_memory->CallMethod(method_call);
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break;
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default:
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UNIMPLEMENTED_MSG("Unimplemented engine");
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}
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}
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2018-03-18 20:15:05 +00:00
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} // namespace Tegra
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