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80 lines
2.5 KiB
C++
80 lines
2.5 KiB
C++
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <span>
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#include "shader_recompiler/exception.h"
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#include "shader_recompiler/frontend/ir/basic_block.h"
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#include "shader_recompiler/frontend/ir/ir_emitter.h"
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#include "shader_recompiler/frontend/maxwell/control_flow.h"
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#include "shader_recompiler/frontend/maxwell/termination_code.h"
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namespace Shader::Maxwell {
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static void EmitExit(IR::IREmitter& ir) {
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ir.Exit();
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}
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static IR::U1 GetFlowTest(IR::FlowTest flow_test, IR::IREmitter& ir) {
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switch (flow_test) {
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case IR::FlowTest::T:
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return ir.Imm1(true);
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case IR::FlowTest::F:
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return ir.Imm1(false);
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case IR::FlowTest::NE:
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// FIXME: Verify this
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return ir.LogicalNot(ir.GetZFlag());
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case IR::FlowTest::NaN:
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// FIXME: Verify this
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return ir.LogicalAnd(ir.GetSFlag(), ir.GetZFlag());
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default:
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throw NotImplementedException("Flow test {}", flow_test);
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}
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}
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static IR::U1 GetCond(IR::Condition cond, IR::IREmitter& ir) {
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const IR::FlowTest flow_test{cond.FlowTest()};
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const auto [pred, pred_negated]{cond.Pred()};
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if (pred == IR::Pred::PT && !pred_negated) {
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return GetFlowTest(flow_test, ir);
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}
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if (flow_test == IR::FlowTest::T) {
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return ir.GetPred(pred, pred_negated);
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}
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return ir.LogicalAnd(ir.GetPred(pred, pred_negated), GetFlowTest(flow_test, ir));
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}
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static void EmitBranch(const Flow::Block& flow_block, std::span<IR::Block* const> block_map,
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IR::IREmitter& ir) {
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if (flow_block.cond == true) {
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return ir.Branch(block_map[flow_block.branch_true]);
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}
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if (flow_block.cond == false) {
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return ir.Branch(block_map[flow_block.branch_false]);
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}
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return ir.BranchConditional(GetCond(flow_block.cond, ir), block_map[flow_block.branch_true],
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block_map[flow_block.branch_false]);
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}
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void EmitTerminationCode(const Flow::Block& flow_block, std::span<IR::Block* const> block_map) {
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IR::Block* const block{block_map[flow_block.id]};
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IR::IREmitter ir(*block);
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switch (flow_block.end_class) {
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case Flow::EndClass::Branch:
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EmitBranch(flow_block, block_map, ir);
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break;
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case Flow::EndClass::Exit:
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EmitExit(ir);
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break;
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case Flow::EndClass::Return:
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ir.Return();
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break;
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case Flow::EndClass::Unreachable:
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ir.Unreachable();
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break;
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}
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}
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} // namespace Shader::Maxwell
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