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https://github.com/citra-emu/citra.git
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@ -4362,6 +4362,8 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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cpu->Reg[14] = Memory::Read32(addr);
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else
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cpu->Reg_usr[1] = Memory::Read32(addr);
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addr += 4;
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}
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} else if (!BIT(inst, 22)) {
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for(int i = 0; i < 16; i++ ){
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@ -5974,54 +5976,51 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
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unsigned int inst = inst_cream->inst;
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int i;
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unsigned int Rn = BITS(inst, 16, 19);
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unsigned int old_RN = cpu->Reg[Rn];
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inst_cream->get_addr(cpu, inst_cream->inst, addr, 0);
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if (BIT(inst_cream->inst, 22) == 1) {
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for (i = 0; i < 13; i++) {
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if(BIT(inst_cream->inst, i)) {
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for (int i = 0; i < 13; i++) {
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if (BIT(inst_cream->inst, i)) {
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Memory::Write32(addr, cpu->Reg[i]);
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addr += 4;
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}
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}
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if (BIT(inst_cream->inst, 13)) {
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if (cpu->Mode == USER32MODE) {
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Memory::Write32(addr, cpu->Reg[i]);
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addr += 4;
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} else {
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if (cpu->Mode == USER32MODE)
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Memory::Write32(addr, cpu->Reg[13]);
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else
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Memory::Write32(addr, cpu->Reg_usr[0]);
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addr += 4;
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}
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addr += 4;
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}
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if (BIT(inst_cream->inst, 14)) {
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if (cpu->Mode == USER32MODE) {
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Memory::Write32(addr, cpu->Reg[i]);
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addr += 4;
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} else {
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if (cpu->Mode == USER32MODE)
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Memory::Write32(addr, cpu->Reg[14]);
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else
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Memory::Write32(addr, cpu->Reg_usr[1]);
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addr += 4;
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}
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addr += 4;
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}
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if (BIT(inst_cream->inst, 15)) {
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Memory::Write32(addr, cpu->Reg_usr[1] + 8);
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}
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} else {
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for( i = 0; i < 15; i++ ) {
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if(BIT(inst_cream->inst, i)) {
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if(i == Rn)
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for (int i = 0; i < 15; i++) {
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if (BIT(inst_cream->inst, i)) {
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if (i == Rn)
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Memory::Write32(addr, old_RN);
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else
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Memory::Write32(addr, cpu->Reg[i]);
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addr += 4;
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}
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}
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// Check PC reg
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if(BIT(inst_cream->inst, i)) {
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if (BIT(inst_cream->inst, 15))
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Memory::Write32(addr, cpu->Reg_usr[1] + 8);
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}
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}
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}
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cpu->Reg[15] += GET_INST_SIZE(cpu);
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