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fixup! tests/JitX64: Address comments
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@ -7,6 +7,7 @@ set(HEADERS
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if(ARCHITECTURE_x86_64)
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if(ARCHITECTURE_x86_64)
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set(SRCS ${SRCS}
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set(SRCS ${SRCS}
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core/arm/jit_x64/rand_int.h
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core/arm/jit_x64/fuzz_arm_data_processing.cpp
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core/arm/jit_x64/fuzz_arm_data_processing.cpp
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)
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)
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endif()
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endif()
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@ -4,7 +4,6 @@
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#include <cstdio>
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#include <cstdio>
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#include <cstring>
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#include <cstring>
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#include <random>
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#include <catch.hpp>
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#include <catch.hpp>
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@ -17,6 +16,8 @@
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#include "core/core.h"
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#include "core/core.h"
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#include "core/memory_setup.h"
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#include "core/memory_setup.h"
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#include "tests/core/arm/jit_x64/rand_int.h"
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std::pair<u32, u32> FromBitString(const char* str) {
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std::pair<u32, u32> FromBitString(const char* str) {
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REQUIRE(strlen(str) == 32);
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REQUIRE(strlen(str) == 32);
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@ -40,13 +41,6 @@ std::pair<u32, u32> FromBitString(const char* str) {
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return { bits, mask };
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return { bits, mask };
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}
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}
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u32 RandInt(u32 min, u32 max) {
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static std::random_device rd;
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static std::mt19937 mt(rd());
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std::uniform_int_distribution<u32> rand(min, max);
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return rand(mt);
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}
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void FuzzJit(const int instruction_count, const int run_count, const std::function<u32()> instruction_generator) {
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void FuzzJit(const int instruction_count, const int run_count, const std::function<u32()> instruction_generator) {
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// Init core
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// Init core
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Core::Init();
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Core::Init();
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@ -54,8 +48,7 @@ void FuzzJit(const int instruction_count, const int run_count, const std::functi
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// Prepare memory
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// Prepare memory
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constexpr size_t MEMORY_SIZE = 4096 * 2;
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constexpr size_t MEMORY_SIZE = 4096 * 2;
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std::array<u8, MEMORY_SIZE> test_mem;
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std::array<u8, MEMORY_SIZE> test_mem{};
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std::memset(test_mem.data(), 0, MEMORY_SIZE);
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Memory::MapMemoryRegion(0, MEMORY_SIZE, test_mem.data());
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Memory::MapMemoryRegion(0, MEMORY_SIZE, test_mem.data());
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SCOPE_EXIT({ Memory::UnmapRegion(0, MEMORY_SIZE); });
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SCOPE_EXIT({ Memory::UnmapRegion(0, MEMORY_SIZE); });
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@ -73,7 +66,7 @@ void FuzzJit(const int instruction_count, const int run_count, const std::functi
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u32 initial_regs[15];
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u32 initial_regs[15];
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for (int i = 0; i < 15; i++) {
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for (int i = 0; i < 15; i++) {
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u32 val = RandInt(0, 0xFFFFFFFF);
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u32 val = RandInt<u32>(0, 0xFFFFFFFF);
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interp.SetReg(i, val);
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interp.SetReg(i, val);
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jit.SetReg(i, val);
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jit.SetReg(i, val);
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initial_regs[i] = val;
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initial_regs[i] = val;
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@ -200,18 +193,18 @@ TEST_CASE("Fuzz ARM data processing instructions", "[JitX64]") {
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}};
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}};
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auto instruction_select_without_R15 = [&]() -> u32 {
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auto instruction_select_without_R15 = [&]() -> u32 {
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size_t inst_index = RandInt(0, instructions.size() - 1);
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size_t inst_index = RandInt<size_t>(0, instructions.size() - 1);
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u32 cond = 0xE;
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u32 cond = 0xE;
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// Have a one-in-twenty-five chance of actually having a cond.
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// Have a one-in-twenty-five chance of actually having a cond.
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if (RandInt(1, 25) == 1) {
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if (RandInt(1, 25) == 1) {
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cond = RandInt(0x0, 0xD);
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cond = RandInt<u32>(0x0, 0xD);
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}
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}
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u32 Rn = RandInt(0, 15);
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u32 Rn = RandInt<u32>(0, 15);
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u32 Rd = RandInt(0, 14);
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u32 Rd = RandInt<u32>(0, 14);
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u32 S = RandInt(0, 1);
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u32 S = RandInt<u32>(0, 1);
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u32 shifter_operand = RandInt(0, 0xFFF);
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u32 shifter_operand = RandInt<u32>(0, 0xFFF);
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u32 assemble_randoms = (shifter_operand << 0) | (Rd << 12) | (Rn << 16) | (S << 20) | (cond << 28);
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u32 assemble_randoms = (shifter_operand << 0) | (Rd << 12) | (Rn << 16) | (S << 20) | (cond << 28);
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@ -223,22 +216,22 @@ TEST_CASE("Fuzz ARM data processing instructions", "[JitX64]") {
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}
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}
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SECTION("long blocks") {
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SECTION("long blocks") {
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FuzzJit(1024, 50, instruction_select_without_R15);
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FuzzJit(1024, 15, instruction_select_without_R15);
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}
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}
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auto instruction_select_only_R15 = [&]() -> u32 {
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auto instruction_select_only_R15 = [&]() -> u32 {
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size_t inst_index = RandInt(0, instructions.size() - 1);
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size_t inst_index = RandInt<size_t>(0, instructions.size() - 1);
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u32 cond = 0xE;
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u32 cond = 0xE;
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// Have a one-in-twenty-five chance of actually having a cond.
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// Have a one-in-twenty-five chance of actually having a cond.
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if (RandInt(1, 25) == 1) {
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if (RandInt(1, 25) == 1) {
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cond = RandInt(0x0, 0xD);
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cond = RandInt<u32>(0x0, 0xD);
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}
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}
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u32 Rn = RandInt(0, 15);
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u32 Rn = RandInt<u32>(0, 15);
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u32 Rd = 15;
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u32 Rd = 15;
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u32 S = 0;
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u32 S = 0;
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u32 shifter_operand = RandInt(0, 0xFFF);
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u32 shifter_operand = RandInt<u32>(0, 0xFFF);
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u32 assemble_randoms = (shifter_operand << 0) | (Rd << 12) | (Rn << 16) | (S << 20) | (cond << 28);
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u32 assemble_randoms = (shifter_operand << 0) | (Rd << 12) | (Rn << 16) | (S << 20) | (cond << 28);
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15
src/tests/core/arm/jit_x64/rand_int.h
Normal file
15
src/tests/core/arm/jit_x64/rand_int.h
Normal file
@ -0,0 +1,15 @@
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// Copyright 2016 Citra Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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#include <random>
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template <typename T>
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T RandInt(T min, T max) {
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static std::random_device rd;
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static std::mt19937 mt(rd());
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std::uniform_int_distribution<T> rand(min, max);
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return rand(mt);
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}
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