fixup! tests/JitX64: Address comments

This commit is contained in:
MerryMage 2016-03-23 01:06:49 +00:00
parent 9874fae84b
commit d00db8c525
3 changed files with 31 additions and 22 deletions

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@ -7,6 +7,7 @@ set(HEADERS
if(ARCHITECTURE_x86_64) if(ARCHITECTURE_x86_64)
set(SRCS ${SRCS} set(SRCS ${SRCS}
core/arm/jit_x64/rand_int.h
core/arm/jit_x64/fuzz_arm_data_processing.cpp core/arm/jit_x64/fuzz_arm_data_processing.cpp
) )
endif() endif()

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@ -4,7 +4,6 @@
#include <cstdio> #include <cstdio>
#include <cstring> #include <cstring>
#include <random>
#include <catch.hpp> #include <catch.hpp>
@ -17,6 +16,8 @@
#include "core/core.h" #include "core/core.h"
#include "core/memory_setup.h" #include "core/memory_setup.h"
#include "tests/core/arm/jit_x64/rand_int.h"
std::pair<u32, u32> FromBitString(const char* str) { std::pair<u32, u32> FromBitString(const char* str) {
REQUIRE(strlen(str) == 32); REQUIRE(strlen(str) == 32);
@ -40,13 +41,6 @@ std::pair<u32, u32> FromBitString(const char* str) {
return { bits, mask }; return { bits, mask };
} }
u32 RandInt(u32 min, u32 max) {
static std::random_device rd;
static std::mt19937 mt(rd());
std::uniform_int_distribution<u32> rand(min, max);
return rand(mt);
}
void FuzzJit(const int instruction_count, const int run_count, const std::function<u32()> instruction_generator) { void FuzzJit(const int instruction_count, const int run_count, const std::function<u32()> instruction_generator) {
// Init core // Init core
Core::Init(); Core::Init();
@ -54,8 +48,7 @@ void FuzzJit(const int instruction_count, const int run_count, const std::functi
// Prepare memory // Prepare memory
constexpr size_t MEMORY_SIZE = 4096 * 2; constexpr size_t MEMORY_SIZE = 4096 * 2;
std::array<u8, MEMORY_SIZE> test_mem; std::array<u8, MEMORY_SIZE> test_mem{};
std::memset(test_mem.data(), 0, MEMORY_SIZE);
Memory::MapMemoryRegion(0, MEMORY_SIZE, test_mem.data()); Memory::MapMemoryRegion(0, MEMORY_SIZE, test_mem.data());
SCOPE_EXIT({ Memory::UnmapRegion(0, MEMORY_SIZE); }); SCOPE_EXIT({ Memory::UnmapRegion(0, MEMORY_SIZE); });
@ -73,7 +66,7 @@ void FuzzJit(const int instruction_count, const int run_count, const std::functi
u32 initial_regs[15]; u32 initial_regs[15];
for (int i = 0; i < 15; i++) { for (int i = 0; i < 15; i++) {
u32 val = RandInt(0, 0xFFFFFFFF); u32 val = RandInt<u32>(0, 0xFFFFFFFF);
interp.SetReg(i, val); interp.SetReg(i, val);
jit.SetReg(i, val); jit.SetReg(i, val);
initial_regs[i] = val; initial_regs[i] = val;
@ -200,18 +193,18 @@ TEST_CASE("Fuzz ARM data processing instructions", "[JitX64]") {
}}; }};
auto instruction_select_without_R15 = [&]() -> u32 { auto instruction_select_without_R15 = [&]() -> u32 {
size_t inst_index = RandInt(0, instructions.size() - 1); size_t inst_index = RandInt<size_t>(0, instructions.size() - 1);
u32 cond = 0xE; u32 cond = 0xE;
// Have a one-in-twenty-five chance of actually having a cond. // Have a one-in-twenty-five chance of actually having a cond.
if (RandInt(1, 25) == 1) { if (RandInt(1, 25) == 1) {
cond = RandInt(0x0, 0xD); cond = RandInt<u32>(0x0, 0xD);
} }
u32 Rn = RandInt(0, 15); u32 Rn = RandInt<u32>(0, 15);
u32 Rd = RandInt(0, 14); u32 Rd = RandInt<u32>(0, 14);
u32 S = RandInt(0, 1); u32 S = RandInt<u32>(0, 1);
u32 shifter_operand = RandInt(0, 0xFFF); u32 shifter_operand = RandInt<u32>(0, 0xFFF);
u32 assemble_randoms = (shifter_operand << 0) | (Rd << 12) | (Rn << 16) | (S << 20) | (cond << 28); u32 assemble_randoms = (shifter_operand << 0) | (Rd << 12) | (Rn << 16) | (S << 20) | (cond << 28);
@ -223,22 +216,22 @@ TEST_CASE("Fuzz ARM data processing instructions", "[JitX64]") {
} }
SECTION("long blocks") { SECTION("long blocks") {
FuzzJit(1024, 50, instruction_select_without_R15); FuzzJit(1024, 15, instruction_select_without_R15);
} }
auto instruction_select_only_R15 = [&]() -> u32 { auto instruction_select_only_R15 = [&]() -> u32 {
size_t inst_index = RandInt(0, instructions.size() - 1); size_t inst_index = RandInt<size_t>(0, instructions.size() - 1);
u32 cond = 0xE; u32 cond = 0xE;
// Have a one-in-twenty-five chance of actually having a cond. // Have a one-in-twenty-five chance of actually having a cond.
if (RandInt(1, 25) == 1) { if (RandInt(1, 25) == 1) {
cond = RandInt(0x0, 0xD); cond = RandInt<u32>(0x0, 0xD);
} }
u32 Rn = RandInt(0, 15); u32 Rn = RandInt<u32>(0, 15);
u32 Rd = 15; u32 Rd = 15;
u32 S = 0; u32 S = 0;
u32 shifter_operand = RandInt(0, 0xFFF); u32 shifter_operand = RandInt<u32>(0, 0xFFF);
u32 assemble_randoms = (shifter_operand << 0) | (Rd << 12) | (Rn << 16) | (S << 20) | (cond << 28); u32 assemble_randoms = (shifter_operand << 0) | (Rd << 12) | (Rn << 16) | (S << 20) | (cond << 28);

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@ -0,0 +1,15 @@
// Copyright 2016 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#pragma once
#include <random>
template <typename T>
T RandInt(T min, T max) {
static std::random_device rd;
static std::mt19937 mt(rd());
std::uniform_int_distribution<T> rand(min, max);
return rand(mt);
}