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fixup!

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Subv 2015-12-17 19:32:45 -05:00
parent 53d4b58357
commit a9073b942a
3 changed files with 21 additions and 21 deletions
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12
src/video_core/pica.h
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@ -130,16 +130,16 @@ struct Regs {
}; };
union { union {
BitField< 0, 16, u32> left; BitField< 0, 16, u32> left_minus_1;
BitField<16, 16, u32> top; BitField<16, 16, u32> top_minus_1;
}; };
u32 GetWidth() const { u32 GetTop() const {
return left - right + 1; return top_minus_1 + 1;
} }
u32 GetHeight() const { u32 GetLeft() const {
return top - bottom + 1; return left_minus_1 + 1;
} }
} scissor_test; } scissor_test;

20
src/video_core/rasterizer.cpp
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@ -340,17 +340,17 @@ static void ProcessTriangleInternal(const Shader::OutputVertex& v0,
u16 max_y = std::max({vtxpos[0].y, vtxpos[1].y, vtxpos[2].y}); u16 max_y = std::max({vtxpos[0].y, vtxpos[1].y, vtxpos[2].y});
// Convert the scissor box coordinates to 12.4 fixed point // Convert the scissor box coordinates to 12.4 fixed point
u16 scissor_width = (u16)(regs.scissor_test.GetWidth() << 4); u16 scissor_left = (u16)(regs.scissor_test.GetLeft() << 4);
u16 scissor_height = (u16)(regs.scissor_test.GetHeight() << 4); u16 scissor_top = (u16)(regs.scissor_test.GetTop() << 4);
u16 scissor_x = (u16)(regs.scissor_test.right << 4); u16 scissor_right = (u16)(regs.scissor_test.right << 4);
u16 scissor_y = (u16)(regs.scissor_test.bottom << 4); u16 scissor_bottom = (u16)(regs.scissor_test.bottom << 4);
if (regs.scissor_test.mode == Regs::ScissorMode::Include) { if (regs.scissor_test.mode == Regs::ScissorMode::Include) {
// Calculate the new bounds // Calculate the new bounds
min_x = std::max(min_x, scissor_x); min_x = std::max(min_x, scissor_right);
min_y = std::max(min_y, scissor_y); min_y = std::max(min_y, scissor_bottom);
max_x = std::min(max_x, (u16)(scissor_x + scissor_width)); max_x = std::min(max_x, scissor_left);
max_y = std::min(max_y, (u16)(scissor_y + scissor_height)); max_y = std::min(max_y, scissor_top);
} }
min_x &= Fix12P4::IntMask(); min_x &= Fix12P4::IntMask();
@ -394,8 +394,8 @@ static void ProcessTriangleInternal(const Shader::OutputVertex& v0,
// Do not process the pixel if it's inside the scissor box and the scissor mode is set to Exclude // Do not process the pixel if it's inside the scissor box and the scissor mode is set to Exclude
if (regs.scissor_test.mode == Regs::ScissorMode::Exclude && if (regs.scissor_test.mode == Regs::ScissorMode::Exclude &&
x >= scissor_x && x <= scissor_x + scissor_width && x >= scissor_right && x <= scissor_left &&
y >= scissor_y && y <= scissor_y + scissor_height) { y >= scissor_bottom && y <= scissor_top) {
continue; continue;
} }

10
src/video_core/renderer_opengl/gl_rasterizer.cpp
View File

@ -227,7 +227,7 @@ void RasterizerOpenGL::NotifyPicaRegisterChanged(u32 id) {
state.draw.shader_dirty = true; state.draw.shader_dirty = true;
break; break;
case PICA_REG_INDEX(scissor_test.right): case PICA_REG_INDEX(scissor_test.right):
case PICA_REG_INDEX(scissor_test.left): case PICA_REG_INDEX(scissor_test.left_minus_1):
SyncScissorTest(); SyncScissorTest();
break; break;
@ -672,13 +672,13 @@ void RasterizerOpenGL::SyncScissorTest() {
if (uniform_block_data.data.scissor_right != regs.scissor_test.right || if (uniform_block_data.data.scissor_right != regs.scissor_test.right ||
uniform_block_data.data.scissor_bottom != regs.scissor_test.bottom || uniform_block_data.data.scissor_bottom != regs.scissor_test.bottom ||
uniform_block_data.data.scissor_left != regs.scissor_test.left + 1 || uniform_block_data.data.scissor_left != regs.scissor_test.GetLeft() ||
uniform_block_data.data.scissor_top != regs.scissor_test.top + 1) { uniform_block_data.data.scissor_top != regs.scissor_test.GetTop()) {
uniform_block_data.data.scissor_right = regs.scissor_test.right; uniform_block_data.data.scissor_right = regs.scissor_test.right;
uniform_block_data.data.scissor_bottom = regs.scissor_test.bottom; uniform_block_data.data.scissor_bottom = regs.scissor_test.bottom;
uniform_block_data.data.scissor_left = regs.scissor_test.left + 1; uniform_block_data.data.scissor_left = regs.scissor_test.GetLeft();
uniform_block_data.data.scissor_top = regs.scissor_test.top + 1; uniform_block_data.data.scissor_top = regs.scissor_test.GetTop();
uniform_block_data.dirty = true; uniform_block_data.dirty = true;
} }
} }