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JitX64: Add accessors for ARMul_State::exclusive_tag and ARMul_State::exclusive_state
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@ -171,4 +171,18 @@ Gen::OpArg JitX64::MJitStateVFlag() {
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return Gen::MDisp(reg_alloc.JitStateReg(), offsetof(JitState, cpu_state) + offsetof(ARMul_State, VFlag));
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return Gen::MDisp(reg_alloc.JitStateReg(), offsetof(JitState, cpu_state) + offsetof(ARMul_State, VFlag));
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}
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}
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Gen::OpArg JitX64::MJitStateExclusiveTag() {
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static_assert(std::is_same<decltype(JitState::cpu_state), ARMul_State>::value, "JitState::cpu_state must be ARMul_State");
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static_assert(std::is_same<decltype(ARMul_State::exclusive_tag), u32>::value, "exclusive_tag must be u32");
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return Gen::MDisp(reg_alloc.JitStateReg(), offsetof(JitState, cpu_state) + offsetof(ARMul_State, exclusive_tag));
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}
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Gen::OpArg JitX64::MJitStateExclusiveState() {
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static_assert(std::is_same<decltype(JitState::cpu_state), ARMul_State>::value, "JitState::cpu_state must be ARMul_State");
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static_assert(std::is_same<decltype(ARMul_State::exclusive_state), bool>::value, "exclusive_state must be bool");
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return Gen::MDisp(reg_alloc.JitStateReg(), offsetof(JitState, cpu_state) + offsetof(ARMul_State, exclusive_state));
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}
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}
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}
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@ -82,6 +82,8 @@ private:
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Gen::OpArg MJitStateCFlag();
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Gen::OpArg MJitStateCFlag();
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Gen::OpArg MJitStateNFlag();
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Gen::OpArg MJitStateNFlag();
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Gen::OpArg MJitStateVFlag();
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Gen::OpArg MJitStateVFlag();
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Gen::OpArg MJitStateExclusiveTag();
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Gen::OpArg MJitStateExclusiveState();
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private:
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private:
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struct CondManager {
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struct CondManager {
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@ -240,7 +240,6 @@ public:
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// process for our purposes), not per ARMul_State (which tracks CPU core state).
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// process for our purposes), not per ARMul_State (which tracks CPU core state).
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std::unordered_map<u32, int> instruction_cache;
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std::unordered_map<u32, int> instruction_cache;
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private:
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void ResetMPCoreCP15Registers();
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void ResetMPCoreCP15Registers();
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// Defines a reservation granule of 2 words, which protects the first 2 words starting at the tag.
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// Defines a reservation granule of 2 words, which protects the first 2 words starting at the tag.
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