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fixup! Fix non-MSVC builds

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This commit is contained in:
MerryMage 2016-04-02 15:27:24 +01:00
parent 903d39cee5
commit 32d81463cf
5 changed files with 5 additions and 5 deletions
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2
src/core/arm/disassembler/arm_disasm.cpp
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@ -519,7 +519,7 @@ std::string ARM_Disasm::DisassembleBLX(u32 insn)
if ((insn & 0xFE000000) == 0xFA000000) {
u32 imm24 = insn & 0xFFFFFF;
u32 H = (insn >> 24) & 1;
s32 offset = MathUtil::SignExtend<26, s32>(imm24 << 2 + H << 1) + 8;
s32 offset = MathUtil::SignExtend<26, s32>((imm24 << 2) + (H << 1)) + 8;
return Common::StringFromFormat("blx\t#+%d", offset);
} else if ((insn & 0x0FFFFFF0) == 0x012FFF30) {
u8 cond = (insn >> 28) & 0xf;

2
src/core/arm/jit_x64/instructions/data_processing.cpp
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@ -202,7 +202,7 @@ X64Reg JitX64::CompileDataProcessingHelper_rsr(ArmReg Rs_index, ShiftType shift,
code->MOV(32, R(tmp), Imm32(0));
// }
code->SetJumpTarget(jmp_to_end_1);
code->SetJumpTarget(jmp_to_end_1);
code->SetJumpTarget(jmp_to_end_2);
code->SetJumpTarget(Rs_zero);
}
break;

2
src/core/arm/jit_x64/instructions/load_store.cpp
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@ -1005,7 +1005,7 @@ static void ExecuteSTMBE(u32 start_address, u16 reg_list, JitState* jit_state) {
void JitX64::STM(Cond cond, bool P, bool U, bool W, ArmReg Rn_index, ArmRegList list) {
cond_manager.CompileCond((ConditionCode)cond);
ASSERT(list != 0, "UNPREDICTABLE");
ASSERT_MSG(list != 0, "UNPREDICTABLE");
if (W && (list & (1 << Rn_index)))
ASSERT_MSG((list & ((1 << Rn_index) - 1)) == 0, "UNPREDICTABLE");

2
src/tests/core/arm/jit_x64/fuzz_arm_common.cpp
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@ -2,9 +2,9 @@
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include <cinttypes>
#include <cstdio>
#include <cstring>
#include <inttypes.h>
#include <memory>
#include <vector>

2
src/tests/core/arm/jit_x64/fuzz_thumb.cpp
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@ -2,9 +2,9 @@
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include <cinttypes>
#include <cstdio>
#include <cstring>
#include <inttypes.h>
#include <catch.hpp>