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Threaded vertex rendering
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parent
58a5d370e0
commit
16fb89fef0
@ -9,6 +9,7 @@
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#include "common/assert.h"
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#include "common/logging/log.h"
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#include "common/microprofile.h"
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#include "common/thread_pool.h"
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#include "common/vector_math.h"
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#include "core/hle/service/gsp_gpu.h"
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#include "core/hw/gpu.h"
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@ -298,6 +299,39 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
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const u16* index_address_16 = reinterpret_cast<const u16*>(index_address_8);
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bool index_u16 = index_info.format != 0;
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struct CacheEntry {
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Shader::AttributeBuffer output_attr;
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Shader::OutputVertex output_vertex;
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std::atomic<u32> id;
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std::atomic_flag writing{
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ATOMIC_FLAG_INIT}; // Set when a thread is writing into this entry
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};
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static std::array<CacheEntry, 0x10000> cache;
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// used as a mean to invalidate data from the previous batch without clearing it
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static u32 cache_batch_id = std::numeric_limits<u32>::max();
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++cache_batch_id;
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if (cache_batch_id == 0) { // reset cache if the emu ever runs long enough to overflow id
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++cache_batch_id;
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for (auto& entry : cache)
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entry.id = 0;
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}
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struct VsOutput {
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explicit VsOutput() = default;
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VsOutput(VsOutput&& other) {
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batch_id = 0;
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}
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Pica::Shader::OutputVertex vertex;
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std::atomic<u32> batch_id;
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};
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static std::vector<VsOutput> vs_output;
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while (vs_output.size() < regs.pipeline.num_vertices) {
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vs_output.emplace_back();
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}
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PrimitiveAssembler<Shader::OutputVertex>& primitive_assembler = g_state.primitive_assembler;
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if (g_debug_context && g_debug_context->recorder) {
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@ -314,20 +348,7 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
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}
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}
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DebugUtils::MemoryAccessTracker memory_accesses;
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// Simple circular-replacement vertex cache
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// The size has been tuned for optimal balance between hit-rate and the cost of lookup
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const size_t VERTEX_CACHE_SIZE = 32;
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std::array<u16, VERTEX_CACHE_SIZE> vertex_cache_ids;
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std::array<Shader::AttributeBuffer, VERTEX_CACHE_SIZE> vertex_cache;
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Shader::AttributeBuffer vs_output;
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unsigned int vertex_cache_pos = 0;
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vertex_cache_ids.fill(-1);
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auto* shader_engine = Shader::GetEngine();
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Shader::UnitState shader_unit;
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shader_engine->SetupBatch(g_state.vs, regs.vs.main_offset);
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@ -336,7 +357,11 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
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if (g_state.geometry_pipeline.NeedIndexInput())
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ASSERT(is_indexed);
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for (unsigned int index = 0; index < regs.pipeline.num_vertices; ++index) {
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auto UnitLoop = [&](bool single_thread, u32 index_start, u32 index_end) {
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DebugUtils::MemoryAccessTracker memory_accesses;
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Shader::UnitState shader_unit;
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for (unsigned int index = index_start; index < index_end; ++index) {
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// Indexed rendering doesn't use the start offset
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unsigned int vertex =
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is_indexed ? (index_u16 ? index_address_16[index] : index_address_8[index])
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@ -348,8 +373,16 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
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bool vertex_cache_hit = false;
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Shader::AttributeBuffer output_attr_tmp;
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Shader::AttributeBuffer& output_attr =
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is_indexed ? cache[vertex].output_attr : output_attr_tmp;
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Pica::Shader::OutputVertex output_vertex_tmp;
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Pica::Shader::OutputVertex& output_vertex =
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is_indexed ? cache[vertex].output_vertex : output_vertex_tmp;
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if (is_indexed) {
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if (g_state.geometry_pipeline.NeedIndexInput()) {
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if (single_thread && g_state.geometry_pipeline.NeedIndexInput()) {
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g_state.geometry_pipeline.SubmitIndex(vertex);
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continue;
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}
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@ -360,12 +393,20 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
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size);
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}
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for (unsigned int i = 0; i < VERTEX_CACHE_SIZE; ++i) {
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if (vertex == vertex_cache_ids[i]) {
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vs_output = vertex_cache[i];
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if (single_thread) {
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if (cache[vertex].id.load(std::memory_order_relaxed) == cache_batch_id) {
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vertex_cache_hit = true;
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break;
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}
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} else if (cache[vertex].id.load(std::memory_order_acquire) == cache_batch_id) {
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vertex_cache_hit = true;
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}
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// Set the "writing" flag and check its previous status
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else if (cache[vertex].writing.test_and_set(std::memory_order_acquire)) {
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// Another thread is writing into the cache, spin until it's done
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while (cache[vertex].writing.test_and_set(std::memory_order_acquire))
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;
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cache[vertex].writing.clear(std::memory_order_release);
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vertex_cache_hit = true;
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}
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}
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@ -377,25 +418,73 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
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// Send to vertex shader
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if (g_debug_context)
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g_debug_context->OnEvent(DebugContext::Event::VertexShaderInvocation,
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(void*)&input);
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&input);
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shader_unit.LoadInput(regs.vs, input);
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shader_engine->Run(g_state.vs, shader_unit);
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shader_unit.WriteOutput(regs.vs, vs_output);
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shader_unit.WriteOutput(regs.vs, output_attr);
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if (!single_thread)
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output_vertex =
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Shader::OutputVertex::FromAttributeBuffer(regs.rasterizer, output_attr);
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if (is_indexed) {
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vertex_cache[vertex_cache_pos] = vs_output;
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vertex_cache_ids[vertex_cache_pos] = vertex;
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vertex_cache_pos = (vertex_cache_pos + 1) % VERTEX_CACHE_SIZE;
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if (single_thread) {
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cache[vertex].id.store(cache_batch_id, std::memory_order_relaxed);
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} else {
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cache[vertex].id.store(cache_batch_id, std::memory_order_release);
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cache[vertex].writing.clear(std::memory_order_release);
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}
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}
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}
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if (single_thread) {
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// Send to geometry pipeline
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g_state.geometry_pipeline.SubmitVertex(vs_output);
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g_state.geometry_pipeline.SubmitVertex(output_attr);
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} else {
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vs_output[index].vertex = output_vertex;
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vs_output[index].batch_id.store(cache_batch_id, std::memory_order_release);
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}
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}
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static std::mutex dbg_mtx;
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if (!memory_accesses.ranges.empty()) {
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std::lock_guard<std::mutex> lock(dbg_mtx);
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for (auto& range : memory_accesses.ranges) {
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g_debug_context->recorder->MemoryAccessed(Memory::GetPhysicalPointer(range.first),
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range.second, range.first);
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g_debug_context->recorder->MemoryAccessed(
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Memory::GetPhysicalPointer(range.first), range.second, range.first);
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}
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}
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};
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constexpr unsigned int VS_UNITS = 3;
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const bool use_gs = regs.pipeline.use_gs == PipelineRegs::UseGS::Yes;
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auto& thread_pool = Common::ThreadPool::GetPool();
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unsigned int num_threads = use_gs ? 1 : VS_UNITS;
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if (num_threads == 1) {
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UnitLoop(true, 0, regs.pipeline.num_vertices);
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} else {
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const u32 range = std::max(regs.pipeline.num_vertices / num_threads + 1, 50u);
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for (unsigned int thread_id = 0; thread_id < num_threads; ++thread_id) {
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const u32 loop_start = range * thread_id;
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const u32 loop_end = loop_start + range;
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if (loop_end >= regs.pipeline.num_vertices) {
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thread_pool.push(UnitLoop, false, loop_start, regs.pipeline.num_vertices);
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break;
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}
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thread_pool.push(UnitLoop, false, loop_start, loop_end);
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}
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for (unsigned int index = 0; index < regs.pipeline.num_vertices; ++index) {
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while (vs_output[index].batch_id.load(std::memory_order_acquire) != cache_batch_id)
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;
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using Pica::Shader::OutputVertex;
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primitive_assembler.SubmitVertex(
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vs_output[index].vertex,
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[](const OutputVertex& v0, const OutputVertex& v1, const OutputVertex& v2) {
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VideoCore::g_renderer->Rasterizer()->AddTriangle(v0, v1, v2);
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});
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}
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}
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VideoCore::g_renderer->Rasterizer()->DrawTriangles();
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