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Merge pull request #2255 from JayFoxRox/lsl4
shader_jit: Load LOOPCOUNT_REG and LOOPINC 4 bit left-shifted
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018191c1f0
@ -102,11 +102,11 @@ static const X64Reg SETUP = R9;
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/// The two 32-bit VS address offset registers set by the MOVA instruction
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static const X64Reg ADDROFFS_REG_0 = R10;
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static const X64Reg ADDROFFS_REG_1 = R11;
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/// VS loop count register
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/// VS loop count register (Multiplied by 16)
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static const X64Reg LOOPCOUNT_REG = R12;
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/// Current VS loop iteration number (we could probably use LOOPCOUNT_REG, but this quicker)
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static const X64Reg LOOPCOUNT = RSI;
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/// Number to increment LOOPCOUNT_REG by on each loop iteration
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/// Number to increment LOOPCOUNT_REG by on each loop iteration (Multiplied by 16)
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static const X64Reg LOOPINC = RDI;
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/// Result of the previous CMP instruction for the X-component comparison
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static const X64Reg COND0 = R13;
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@ -718,15 +718,18 @@ void JitShader::Compile_LOOP(Instruction instr) {
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looping = true;
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// This decodes the fields from the integer uniform at index instr.flow_control.int_uniform_id.
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// The Y (LOOPCOUNT_REG) and Z (LOOPINC) component are kept multiplied by 16 (Left shifted by
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// 4 bits) to be used as an offset into the 16-byte vector registers later
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int offset =
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ShaderSetup::UniformOffset(RegisterType::IntUniform, instr.flow_control.int_uniform_id);
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MOV(32, R(LOOPCOUNT), MDisp(SETUP, offset));
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MOV(32, R(LOOPCOUNT_REG), R(LOOPCOUNT));
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SHR(32, R(LOOPCOUNT_REG), Imm8(8));
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AND(32, R(LOOPCOUNT_REG), Imm32(0xff)); // Y-component is the start
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SHR(32, R(LOOPCOUNT_REG), Imm8(4));
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AND(32, R(LOOPCOUNT_REG), Imm32(0xFF0)); // Y-component is the start
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MOV(32, R(LOOPINC), R(LOOPCOUNT));
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SHR(32, R(LOOPINC), Imm8(16));
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MOVZX(32, 8, LOOPINC, R(LOOPINC)); // Z-component is the incrementer
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SHR(32, R(LOOPINC), Imm8(12));
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AND(32, R(LOOPINC), Imm32(0xFF0)); // Z-component is the incrementer
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MOVZX(32, 8, LOOPCOUNT, R(LOOPCOUNT)); // X-component is iteration count
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ADD(32, R(LOOPCOUNT), Imm8(1)); // Iteration count is X-component + 1
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