mirror of
https://github.com/yuzu-emu/yuzu.git
synced 2024-12-25 17:40:06 +00:00
d5fc56db4b
Depends on https://github.com/yuzu-emu/build-environments/pull/69 clang-15 primary run
777 lines
24 KiB
C++
777 lines
24 KiB
C++
// SPDX-FileCopyrightText: 2013-2016 Cameron Desrochers
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// SPDX-FileCopyrightText: 2015 Jeff Preshing
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// SPDX-License-Identifier: BSD-2-Clause AND Zlib
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// Distributed under the simplified BSD license (see the license file that
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// should have come with this header).
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// Uses Jeff Preshing's semaphore implementation (under the terms of its
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// separate zlib license, embedded below).
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#pragma once
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// Provides portable (VC++2010+, Intel ICC 13, GCC 4.7+, and anything C++11 compliant)
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// implementation of low-level memory barriers, plus a few semi-portable utility macros (for
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// inlining and alignment). Also has a basic atomic type (limited to hardware-supported atomics with
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// no memory ordering guarantees). Uses the AE_* prefix for macros (historical reasons), and the
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// "moodycamel" namespace for symbols.
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#include <cassert>
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#include <cerrno>
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#include <cstdint>
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#include <ctime>
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#include <type_traits>
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// Platform detection
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#if defined(__INTEL_COMPILER)
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#define AE_ICC
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#elif defined(_MSC_VER)
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#define AE_VCPP
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#elif defined(__GNUC__)
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#define AE_GCC
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#endif
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#if defined(_M_IA64) || defined(__ia64__)
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#define AE_ARCH_IA64
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#elif defined(_WIN64) || defined(__amd64__) || defined(_M_X64) || defined(__x86_64__)
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#define AE_ARCH_X64
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#elif defined(_M_IX86) || defined(__i386__)
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#define AE_ARCH_X86
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#elif defined(_M_PPC) || defined(__powerpc__)
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#define AE_ARCH_PPC
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#else
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#define AE_ARCH_UNKNOWN
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#endif
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// AE_UNUSED
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#define AE_UNUSED(x) ((void)x)
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// AE_NO_TSAN/AE_TSAN_ANNOTATE_*
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#if defined(__has_feature)
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#if __has_feature(thread_sanitizer)
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#if __cplusplus >= 201703L // inline variables require C++17
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namespace Common {
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inline int ae_tsan_global;
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}
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#define AE_TSAN_ANNOTATE_RELEASE() \
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AnnotateHappensBefore(__FILE__, __LINE__, (void*)(&::moodycamel::ae_tsan_global))
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#define AE_TSAN_ANNOTATE_ACQUIRE() \
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AnnotateHappensAfter(__FILE__, __LINE__, (void*)(&::moodycamel::ae_tsan_global))
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extern "C" void AnnotateHappensBefore(const char*, int, void*);
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extern "C" void AnnotateHappensAfter(const char*, int, void*);
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#else // when we can't work with tsan, attempt to disable its warnings
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#define AE_NO_TSAN __attribute__((no_sanitize("thread")))
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#endif
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#endif
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#endif
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#ifndef AE_NO_TSAN
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#define AE_NO_TSAN
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#endif
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#ifndef AE_TSAN_ANNOTATE_RELEASE
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#define AE_TSAN_ANNOTATE_RELEASE()
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#define AE_TSAN_ANNOTATE_ACQUIRE()
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#endif
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// AE_FORCEINLINE
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#if defined(AE_VCPP) || defined(AE_ICC)
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#define AE_FORCEINLINE __forceinline
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#elif defined(AE_GCC)
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// #define AE_FORCEINLINE __attribute__((always_inline))
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#define AE_FORCEINLINE inline
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#else
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#define AE_FORCEINLINE inline
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#endif
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// AE_ALIGN
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#if defined(AE_VCPP) || defined(AE_ICC)
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#define AE_ALIGN(x) __declspec(align(x))
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#elif defined(AE_GCC)
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#define AE_ALIGN(x) __attribute__((aligned(x)))
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#else
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// Assume GCC compliant syntax...
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#define AE_ALIGN(x) __attribute__((aligned(x)))
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#endif
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// Portable atomic fences implemented below:
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namespace Common {
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enum memory_order {
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memory_order_relaxed,
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memory_order_acquire,
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memory_order_release,
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memory_order_acq_rel,
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memory_order_seq_cst,
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// memory_order_sync: Forces a full sync:
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// #LoadLoad, #LoadStore, #StoreStore, and most significantly, #StoreLoad
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memory_order_sync = memory_order_seq_cst
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};
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} // namespace Common
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#if (defined(AE_VCPP) && (_MSC_VER < 1700 || defined(__cplusplus_cli))) || \
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(defined(AE_ICC) && __INTEL_COMPILER < 1600)
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// VS2010 and ICC13 don't support std::atomic_*_fence, implement our own fences
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#include <intrin.h>
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#if defined(AE_ARCH_X64) || defined(AE_ARCH_X86)
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#define AeFullSync _mm_mfence
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#define AeLiteSync _mm_mfence
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#elif defined(AE_ARCH_IA64)
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#define AeFullSync __mf
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#define AeLiteSync __mf
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#elif defined(AE_ARCH_PPC)
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#include <ppcintrinsics.h>
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#define AeFullSync __sync
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#define AeLiteSync __lwsync
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#endif
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#ifdef AE_VCPP
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#pragma warning(push)
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#pragma warning(disable : 4365) // Disable erroneous 'conversion from long to unsigned int,
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// signed/unsigned mismatch' error when using `assert`
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#ifdef __cplusplus_cli
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#pragma managed(push, off)
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#endif
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#endif
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namespace Common {
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AE_FORCEINLINE void compiler_fence(memory_order order) AE_NO_TSAN {
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switch (order) {
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case memory_order_relaxed:
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break;
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case memory_order_acquire:
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_ReadBarrier();
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break;
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case memory_order_release:
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_WriteBarrier();
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break;
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case memory_order_acq_rel:
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_ReadWriteBarrier();
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break;
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case memory_order_seq_cst:
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_ReadWriteBarrier();
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break;
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default:
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assert(false);
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break;
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}
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}
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// x86/x64 have a strong memory model -- all loads and stores have
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// acquire and release semantics automatically (so only need compiler
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// barriers for those).
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#if defined(AE_ARCH_X86) || defined(AE_ARCH_X64)
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AE_FORCEINLINE void fence(memory_order order) AE_NO_TSAN {
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switch (order) {
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case memory_order_relaxed:
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break;
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case memory_order_acquire:
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_ReadBarrier();
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break;
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case memory_order_release:
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_WriteBarrier();
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break;
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case memory_order_acq_rel:
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_ReadWriteBarrier();
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break;
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case memory_order_seq_cst:
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_ReadWriteBarrier();
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AeFullSync();
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_ReadWriteBarrier();
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break;
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default:
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assert(false);
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}
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}
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#else
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AE_FORCEINLINE void fence(memory_order order) AE_NO_TSAN {
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// Non-specialized arch, use heavier memory barriers everywhere just in case :-(
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switch (order) {
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case memory_order_relaxed:
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break;
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case memory_order_acquire:
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_ReadBarrier();
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AeLiteSync();
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_ReadBarrier();
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break;
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case memory_order_release:
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_WriteBarrier();
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AeLiteSync();
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_WriteBarrier();
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break;
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case memory_order_acq_rel:
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_ReadWriteBarrier();
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AeLiteSync();
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_ReadWriteBarrier();
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break;
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case memory_order_seq_cst:
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_ReadWriteBarrier();
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AeFullSync();
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_ReadWriteBarrier();
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break;
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default:
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assert(false);
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}
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}
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#endif
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} // namespace Common
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#else
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// Use standard library of atomics
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#include <atomic>
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namespace Common {
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AE_FORCEINLINE void compiler_fence(memory_order order) AE_NO_TSAN {
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switch (order) {
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case memory_order_relaxed:
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break;
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case memory_order_acquire:
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std::atomic_signal_fence(std::memory_order_acquire);
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break;
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case memory_order_release:
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std::atomic_signal_fence(std::memory_order_release);
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break;
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case memory_order_acq_rel:
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std::atomic_signal_fence(std::memory_order_acq_rel);
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break;
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case memory_order_seq_cst:
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std::atomic_signal_fence(std::memory_order_seq_cst);
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break;
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default:
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assert(false);
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}
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}
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AE_FORCEINLINE void fence(memory_order order) AE_NO_TSAN {
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switch (order) {
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case memory_order_relaxed:
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break;
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case memory_order_acquire:
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AE_TSAN_ANNOTATE_ACQUIRE();
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std::atomic_thread_fence(std::memory_order_acquire);
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break;
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case memory_order_release:
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AE_TSAN_ANNOTATE_RELEASE();
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std::atomic_thread_fence(std::memory_order_release);
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break;
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case memory_order_acq_rel:
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AE_TSAN_ANNOTATE_ACQUIRE();
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AE_TSAN_ANNOTATE_RELEASE();
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std::atomic_thread_fence(std::memory_order_acq_rel);
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break;
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case memory_order_seq_cst:
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AE_TSAN_ANNOTATE_ACQUIRE();
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AE_TSAN_ANNOTATE_RELEASE();
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std::atomic_thread_fence(std::memory_order_seq_cst);
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break;
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default:
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assert(false);
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}
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}
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} // namespace Common
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#endif
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#if !defined(AE_VCPP) || (_MSC_VER >= 1700 && !defined(__cplusplus_cli))
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#define AE_USE_STD_ATOMIC_FOR_WEAK_ATOMIC
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#endif
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#ifdef AE_USE_STD_ATOMIC_FOR_WEAK_ATOMIC
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#include <atomic>
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#endif
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#include <utility>
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// WARNING: *NOT* A REPLACEMENT FOR std::atomic. READ CAREFULLY:
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// Provides basic support for atomic variables -- no memory ordering guarantees are provided.
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// The guarantee of atomicity is only made for types that already have atomic load and store
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// guarantees at the hardware level -- on most platforms this generally means aligned pointers and
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// integers (only).
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namespace Common {
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template <typename T>
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class weak_atomic {
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public:
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AE_NO_TSAN weak_atomic() : value() {}
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#ifdef AE_VCPP
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#pragma warning(push)
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#pragma warning(disable : 4100) // Get rid of (erroneous) 'unreferenced formal parameter' warning
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#endif
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template <typename U>
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AE_NO_TSAN weak_atomic(U&& x) : value(std::forward<U>(x)) {}
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#ifdef __cplusplus_cli
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// Work around bug with universal reference/nullptr combination that only appears when /clr is
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// on
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AE_NO_TSAN weak_atomic(nullptr_t) : value(nullptr) {}
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#endif
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AE_NO_TSAN weak_atomic(weak_atomic const& other) : value(other.load()) {}
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AE_NO_TSAN weak_atomic(weak_atomic&& other) : value(std::move(other.load())) {}
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#ifdef AE_VCPP
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#pragma warning(pop)
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#endif
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AE_FORCEINLINE operator T() const AE_NO_TSAN {
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return load();
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}
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#ifndef AE_USE_STD_ATOMIC_FOR_WEAK_ATOMIC
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template <typename U>
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AE_FORCEINLINE weak_atomic const& operator=(U&& x) AE_NO_TSAN {
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value = std::forward<U>(x);
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return *this;
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}
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AE_FORCEINLINE weak_atomic const& operator=(weak_atomic const& other) AE_NO_TSAN {
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value = other.value;
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return *this;
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}
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AE_FORCEINLINE T load() const AE_NO_TSAN {
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return value;
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}
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AE_FORCEINLINE T fetch_add_acquire(T increment) AE_NO_TSAN {
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#if defined(AE_ARCH_X64) || defined(AE_ARCH_X86)
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if (sizeof(T) == 4)
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return _InterlockedExchangeAdd((long volatile*)&value, (long)increment);
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#if defined(_M_AMD64)
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else if (sizeof(T) == 8)
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return _InterlockedExchangeAdd64((long long volatile*)&value, (long long)increment);
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#endif
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#else
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#error Unsupported platform
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#endif
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assert(false && "T must be either a 32 or 64 bit type");
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return value;
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}
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AE_FORCEINLINE T fetch_add_release(T increment) AE_NO_TSAN {
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#if defined(AE_ARCH_X64) || defined(AE_ARCH_X86)
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if (sizeof(T) == 4)
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return _InterlockedExchangeAdd((long volatile*)&value, (long)increment);
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#if defined(_M_AMD64)
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else if (sizeof(T) == 8)
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return _InterlockedExchangeAdd64((long long volatile*)&value, (long long)increment);
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#endif
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#else
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#error Unsupported platform
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#endif
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assert(false && "T must be either a 32 or 64 bit type");
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return value;
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}
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#else
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template <typename U>
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AE_FORCEINLINE weak_atomic const& operator=(U&& x) AE_NO_TSAN {
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value.store(std::forward<U>(x), std::memory_order_relaxed);
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return *this;
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}
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AE_FORCEINLINE weak_atomic const& operator=(weak_atomic const& other) AE_NO_TSAN {
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value.store(other.value.load(std::memory_order_relaxed), std::memory_order_relaxed);
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return *this;
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}
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AE_FORCEINLINE T load() const AE_NO_TSAN {
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return value.load(std::memory_order_relaxed);
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}
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AE_FORCEINLINE T fetch_add_acquire(T increment) AE_NO_TSAN {
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return value.fetch_add(increment, std::memory_order_acquire);
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}
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AE_FORCEINLINE T fetch_add_release(T increment) AE_NO_TSAN {
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return value.fetch_add(increment, std::memory_order_release);
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}
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#endif
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private:
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#ifndef AE_USE_STD_ATOMIC_FOR_WEAK_ATOMIC
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// No std::atomic support, but still need to circumvent compiler optimizations.
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// `volatile` will make memory access slow, but is guaranteed to be reliable.
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volatile T value;
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#else
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std::atomic<T> value;
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#endif
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};
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} // namespace Common
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// Portable single-producer, single-consumer semaphore below:
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#if defined(_WIN32)
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// Avoid including windows.h in a header; we only need a handful of
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// items, so we'll redeclare them here (this is relatively safe since
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// the API generally has to remain stable between Windows versions).
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// I know this is an ugly hack but it still beats polluting the global
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// namespace with thousands of generic names or adding a .cpp for nothing.
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extern "C" {
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struct _SECURITY_ATTRIBUTES;
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__declspec(dllimport) void* __stdcall CreateSemaphoreW(_SECURITY_ATTRIBUTES* lpSemaphoreAttributes,
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long lInitialCount, long lMaximumCount,
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const wchar_t* lpName);
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__declspec(dllimport) int __stdcall CloseHandle(void* hObject);
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__declspec(dllimport) unsigned long __stdcall WaitForSingleObject(void* hHandle,
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unsigned long dwMilliseconds);
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__declspec(dllimport) int __stdcall ReleaseSemaphore(void* hSemaphore, long lReleaseCount,
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long* lpPreviousCount);
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}
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#elif defined(__MACH__)
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#include <mach/mach.h>
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#elif defined(__unix__)
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#include <semaphore.h>
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#elif defined(FREERTOS)
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#include <FreeRTOS.h>
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#include <semphr.h>
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#include <task.h>
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#endif
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namespace Common {
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// Code in the spsc_sema namespace below is an adaptation of Jeff Preshing's
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// portable + lightweight semaphore implementations, originally from
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// https://github.com/preshing/cpp11-on-multicore/blob/master/common/sema.h
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// LICENSE:
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// Copyright (c) 2015 Jeff Preshing
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//
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// This software is provided 'as-is', without any express or implied
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// warranty. In no event will the authors be held liable for any damages
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// arising from the use of this software.
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//
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// Permission is granted to anyone to use this software for any purpose,
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// including commercial applications, and to alter it and redistribute it
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// freely, subject to the following restrictions:
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//
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// 1. The origin of this software must not be misrepresented; you must not
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// claim that you wrote the original software. If you use this software
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// in a product, an acknowledgement in the product documentation would be
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// appreciated but is not required.
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// 2. Altered source versions must be plainly marked as such, and must not be
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// misrepresented as being the original software.
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// 3. This notice may not be removed or altered from any source distribution.
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namespace spsc_sema {
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#if defined(_WIN32)
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class Semaphore {
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private:
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void* m_hSema;
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Semaphore(const Semaphore& other);
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Semaphore& operator=(const Semaphore& other);
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public:
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AE_NO_TSAN Semaphore(int initialCount = 0) : m_hSema() {
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assert(initialCount >= 0);
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const long maxLong = 0x7fffffff;
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m_hSema = CreateSemaphoreW(nullptr, initialCount, maxLong, nullptr);
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assert(m_hSema);
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}
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AE_NO_TSAN ~Semaphore() {
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CloseHandle(m_hSema);
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}
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bool wait() AE_NO_TSAN {
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const unsigned long infinite = 0xffffffff;
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return WaitForSingleObject(m_hSema, infinite) == 0;
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}
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bool try_wait() AE_NO_TSAN {
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return WaitForSingleObject(m_hSema, 0) == 0;
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}
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bool timed_wait(std::uint64_t usecs) AE_NO_TSAN {
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return WaitForSingleObject(m_hSema, (unsigned long)(usecs / 1000)) == 0;
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}
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void signal(int count = 1) AE_NO_TSAN {
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while (!ReleaseSemaphore(m_hSema, count, nullptr))
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;
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}
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};
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#elif defined(__MACH__)
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//---------------------------------------------------------
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// Semaphore (Apple iOS and OSX)
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// Can't use POSIX semaphores due to
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// http://lists.apple.com/archives/darwin-kernel/2009/Apr/msg00010.html
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//---------------------------------------------------------
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class Semaphore {
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private:
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semaphore_t m_sema;
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Semaphore(const Semaphore& other);
|
|
Semaphore& operator=(const Semaphore& other);
|
|
|
|
public:
|
|
AE_NO_TSAN Semaphore(int initialCount = 0) : m_sema() {
|
|
assert(initialCount >= 0);
|
|
kern_return_t rc =
|
|
semaphore_create(mach_task_self(), &m_sema, SYNC_POLICY_FIFO, initialCount);
|
|
assert(rc == KERN_SUCCESS);
|
|
AE_UNUSED(rc);
|
|
}
|
|
|
|
AE_NO_TSAN ~Semaphore() {
|
|
semaphore_destroy(mach_task_self(), m_sema);
|
|
}
|
|
|
|
bool wait() AE_NO_TSAN {
|
|
return semaphore_wait(m_sema) == KERN_SUCCESS;
|
|
}
|
|
|
|
bool try_wait() AE_NO_TSAN {
|
|
return timed_wait(0);
|
|
}
|
|
|
|
bool timed_wait(std::uint64_t timeout_usecs) AE_NO_TSAN {
|
|
mach_timespec_t ts;
|
|
ts.tv_sec = static_cast<unsigned int>(timeout_usecs / 1000000);
|
|
ts.tv_nsec = static_cast<int>((timeout_usecs % 1000000) * 1000);
|
|
|
|
// added in OSX 10.10:
|
|
// https://developer.apple.com/library/prerelease/mac/documentation/General/Reference/APIDiffsMacOSX10_10SeedDiff/modules/Darwin.html
|
|
kern_return_t rc = semaphore_timedwait(m_sema, ts);
|
|
return rc == KERN_SUCCESS;
|
|
}
|
|
|
|
void signal() AE_NO_TSAN {
|
|
while (semaphore_signal(m_sema) != KERN_SUCCESS)
|
|
;
|
|
}
|
|
|
|
void signal(int count) AE_NO_TSAN {
|
|
while (count-- > 0) {
|
|
while (semaphore_signal(m_sema) != KERN_SUCCESS)
|
|
;
|
|
}
|
|
}
|
|
};
|
|
#elif defined(__unix__)
|
|
//---------------------------------------------------------
|
|
// Semaphore (POSIX, Linux)
|
|
//---------------------------------------------------------
|
|
class Semaphore {
|
|
private:
|
|
sem_t m_sema;
|
|
|
|
Semaphore(const Semaphore& other);
|
|
Semaphore& operator=(const Semaphore& other);
|
|
|
|
public:
|
|
AE_NO_TSAN Semaphore(int initialCount = 0) : m_sema() {
|
|
assert(initialCount >= 0);
|
|
int rc = sem_init(&m_sema, 0, static_cast<unsigned int>(initialCount));
|
|
assert(rc == 0);
|
|
AE_UNUSED(rc);
|
|
}
|
|
|
|
AE_NO_TSAN ~Semaphore() {
|
|
sem_destroy(&m_sema);
|
|
}
|
|
|
|
bool wait() AE_NO_TSAN {
|
|
// http://stackoverflow.com/questions/2013181/gdb-causes-sem-wait-to-fail-with-eintr-error
|
|
int rc;
|
|
do {
|
|
rc = sem_wait(&m_sema);
|
|
} while (rc == -1 && errno == EINTR);
|
|
return rc == 0;
|
|
}
|
|
|
|
bool try_wait() AE_NO_TSAN {
|
|
int rc;
|
|
do {
|
|
rc = sem_trywait(&m_sema);
|
|
} while (rc == -1 && errno == EINTR);
|
|
return rc == 0;
|
|
}
|
|
|
|
bool timed_wait(std::uint64_t usecs) AE_NO_TSAN {
|
|
struct timespec ts;
|
|
const int usecs_in_1_sec = 1000000;
|
|
const int nsecs_in_1_sec = 1000000000;
|
|
clock_gettime(CLOCK_REALTIME, &ts);
|
|
ts.tv_sec += static_cast<time_t>(usecs / usecs_in_1_sec);
|
|
ts.tv_nsec += static_cast<long>(usecs % usecs_in_1_sec) * 1000;
|
|
// sem_timedwait bombs if you have more than 1e9 in tv_nsec
|
|
// so we have to clean things up before passing it in
|
|
if (ts.tv_nsec >= nsecs_in_1_sec) {
|
|
ts.tv_nsec -= nsecs_in_1_sec;
|
|
++ts.tv_sec;
|
|
}
|
|
|
|
int rc;
|
|
do {
|
|
rc = sem_timedwait(&m_sema, &ts);
|
|
} while (rc == -1 && errno == EINTR);
|
|
return rc == 0;
|
|
}
|
|
|
|
void signal() AE_NO_TSAN {
|
|
while (sem_post(&m_sema) == -1)
|
|
;
|
|
}
|
|
|
|
void signal(int count) AE_NO_TSAN {
|
|
while (count-- > 0) {
|
|
while (sem_post(&m_sema) == -1)
|
|
;
|
|
}
|
|
}
|
|
};
|
|
#elif defined(FREERTOS)
|
|
//---------------------------------------------------------
|
|
// Semaphore (FreeRTOS)
|
|
//---------------------------------------------------------
|
|
class Semaphore {
|
|
private:
|
|
SemaphoreHandle_t m_sema;
|
|
|
|
Semaphore(const Semaphore& other);
|
|
Semaphore& operator=(const Semaphore& other);
|
|
|
|
public:
|
|
AE_NO_TSAN Semaphore(int initialCount = 0) : m_sema() {
|
|
assert(initialCount >= 0);
|
|
m_sema = xSemaphoreCreateCounting(static_cast<UBaseType_t>(~0ull),
|
|
static_cast<UBaseType_t>(initialCount));
|
|
assert(m_sema);
|
|
}
|
|
|
|
AE_NO_TSAN ~Semaphore() {
|
|
vSemaphoreDelete(m_sema);
|
|
}
|
|
|
|
bool wait() AE_NO_TSAN {
|
|
return xSemaphoreTake(m_sema, portMAX_DELAY) == pdTRUE;
|
|
}
|
|
|
|
bool try_wait() AE_NO_TSAN {
|
|
// Note: In an ISR context, if this causes a task to unblock,
|
|
// the caller won't know about it
|
|
if (xPortIsInsideInterrupt())
|
|
return xSemaphoreTakeFromISR(m_sema, NULL) == pdTRUE;
|
|
return xSemaphoreTake(m_sema, 0) == pdTRUE;
|
|
}
|
|
|
|
bool timed_wait(std::uint64_t usecs) AE_NO_TSAN {
|
|
std::uint64_t msecs = usecs / 1000;
|
|
TickType_t ticks = static_cast<TickType_t>(msecs / portTICK_PERIOD_MS);
|
|
if (ticks == 0)
|
|
return try_wait();
|
|
return xSemaphoreTake(m_sema, ticks) == pdTRUE;
|
|
}
|
|
|
|
void signal() AE_NO_TSAN {
|
|
// Note: In an ISR context, if this causes a task to unblock,
|
|
// the caller won't know about it
|
|
BaseType_t rc;
|
|
if (xPortIsInsideInterrupt())
|
|
rc = xSemaphoreGiveFromISR(m_sema, NULL);
|
|
else
|
|
rc = xSemaphoreGive(m_sema);
|
|
assert(rc == pdTRUE);
|
|
AE_UNUSED(rc);
|
|
}
|
|
|
|
void signal(int count) AE_NO_TSAN {
|
|
while (count-- > 0)
|
|
signal();
|
|
}
|
|
};
|
|
#else
|
|
#error Unsupported platform! (No semaphore wrapper available)
|
|
#endif
|
|
|
|
//---------------------------------------------------------
|
|
// LightweightSemaphore
|
|
//---------------------------------------------------------
|
|
class LightweightSemaphore {
|
|
public:
|
|
typedef std::make_signed<std::size_t>::type ssize_t;
|
|
|
|
private:
|
|
weak_atomic<ssize_t> m_count;
|
|
Semaphore m_sema;
|
|
|
|
bool waitWithPartialSpinning(std::int64_t timeout_usecs = -1) AE_NO_TSAN {
|
|
ssize_t oldCount;
|
|
// Is there a better way to set the initial spin count?
|
|
// If we lower it to 1000, testBenaphore becomes 15x slower on my Core i7-5930K Windows PC,
|
|
// as threads start hitting the kernel semaphore.
|
|
int spin = 1024;
|
|
while (--spin >= 0) {
|
|
if (m_count.load() > 0) {
|
|
m_count.fetch_add_acquire(-1);
|
|
return true;
|
|
}
|
|
compiler_fence(memory_order_acquire); // Prevent the compiler from collapsing the loop.
|
|
}
|
|
oldCount = m_count.fetch_add_acquire(-1);
|
|
if (oldCount > 0)
|
|
return true;
|
|
if (timeout_usecs < 0) {
|
|
if (m_sema.wait())
|
|
return true;
|
|
}
|
|
if (timeout_usecs > 0 && m_sema.timed_wait(static_cast<uint64_t>(timeout_usecs)))
|
|
return true;
|
|
// At this point, we've timed out waiting for the semaphore, but the
|
|
// count is still decremented indicating we may still be waiting on
|
|
// it. So we have to re-adjust the count, but only if the semaphore
|
|
// wasn't signaled enough times for us too since then. If it was, we
|
|
// need to release the semaphore too.
|
|
while (true) {
|
|
oldCount = m_count.fetch_add_release(1);
|
|
if (oldCount < 0)
|
|
return false; // successfully restored things to the way they were
|
|
// Oh, the producer thread just signaled the semaphore after all. Try again:
|
|
oldCount = m_count.fetch_add_acquire(-1);
|
|
if (oldCount > 0 && m_sema.try_wait())
|
|
return true;
|
|
}
|
|
}
|
|
|
|
public:
|
|
AE_NO_TSAN LightweightSemaphore(ssize_t initialCount = 0) : m_count(initialCount), m_sema() {
|
|
assert(initialCount >= 0);
|
|
}
|
|
|
|
bool tryWait() AE_NO_TSAN {
|
|
if (m_count.load() > 0) {
|
|
m_count.fetch_add_acquire(-1);
|
|
return true;
|
|
}
|
|
return false;
|
|
}
|
|
|
|
bool wait() AE_NO_TSAN {
|
|
return tryWait() || waitWithPartialSpinning();
|
|
}
|
|
|
|
bool wait(std::int64_t timeout_usecs) AE_NO_TSAN {
|
|
return tryWait() || waitWithPartialSpinning(timeout_usecs);
|
|
}
|
|
|
|
void signal(ssize_t count = 1) AE_NO_TSAN {
|
|
assert(count >= 0);
|
|
ssize_t oldCount = m_count.fetch_add_release(count);
|
|
assert(oldCount >= -1);
|
|
if (oldCount < 0) {
|
|
m_sema.signal(1);
|
|
}
|
|
}
|
|
|
|
std::size_t availableApprox() const AE_NO_TSAN {
|
|
ssize_t count = m_count.load();
|
|
return count > 0 ? static_cast<std::size_t>(count) : 0;
|
|
}
|
|
};
|
|
} // namespace spsc_sema
|
|
} // namespace Common
|
|
|
|
#if defined(AE_VCPP) && (_MSC_VER < 1700 || defined(__cplusplus_cli))
|
|
#pragma warning(pop)
|
|
#ifdef __cplusplus_cli
|
|
#pragma managed(pop)
|
|
#endif
|
|
#endif
|