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This formats all copyright comments according to SPDX formatting guidelines. Additionally, this resolves the remaining GPLv2 only licensed files by relicensing them to GPLv2.0-or-later.
202 lines
8.4 KiB
C++
202 lines
8.4 KiB
C++
// SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include <string_view>
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#include "shader_recompiler/backend/glsl/emit_glsl_instructions.h"
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#include "shader_recompiler/backend/glsl/glsl_emit_context.h"
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#include "shader_recompiler/frontend/ir/value.h"
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#include "shader_recompiler/profile.h"
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namespace Shader::Backend::GLSL {
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namespace {
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constexpr char cas_loop[]{"for(;;){{uint old_value={};uint "
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"cas_result=atomicCompSwap({},old_value,bitfieldInsert({},{},{},{}));"
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"if(cas_result==old_value){{break;}}}}"};
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void SsboWriteCas(EmitContext& ctx, const IR::Value& binding, std::string_view offset_var,
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std::string_view value, std::string_view bit_offset, u32 num_bits) {
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const auto ssbo{fmt::format("{}_ssbo{}[{}>>2]", ctx.stage_name, binding.U32(), offset_var)};
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ctx.Add(cas_loop, ssbo, ssbo, ssbo, value, bit_offset, num_bits);
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}
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} // Anonymous namespace
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void EmitLoadGlobalU8(EmitContext&) {
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NotImplemented();
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}
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void EmitLoadGlobalS8(EmitContext&) {
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NotImplemented();
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}
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void EmitLoadGlobalU16(EmitContext&) {
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NotImplemented();
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}
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void EmitLoadGlobalS16(EmitContext&) {
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NotImplemented();
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}
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void EmitLoadGlobal32(EmitContext& ctx, IR::Inst& inst, std::string_view address) {
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if (ctx.profile.support_int64) {
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return ctx.AddU32("{}=LoadGlobal32({});", inst, address);
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}
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LOG_WARNING(Shader_GLSL, "Int64 not supported, ignoring memory operation");
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ctx.AddU32("{}=0u;", inst);
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}
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void EmitLoadGlobal64(EmitContext& ctx, IR::Inst& inst, std::string_view address) {
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if (ctx.profile.support_int64) {
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return ctx.AddU32x2("{}=LoadGlobal64({});", inst, address);
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}
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LOG_WARNING(Shader_GLSL, "Int64 not supported, ignoring memory operation");
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ctx.AddU32x2("{}=uvec2(0);", inst);
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}
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void EmitLoadGlobal128(EmitContext& ctx, IR::Inst& inst, std::string_view address) {
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if (ctx.profile.support_int64) {
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return ctx.AddU32x4("{}=LoadGlobal128({});", inst, address);
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}
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LOG_WARNING(Shader_GLSL, "Int64 not supported, ignoring memory operation");
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ctx.AddU32x4("{}=uvec4(0);", inst);
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}
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void EmitWriteGlobalU8(EmitContext&) {
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NotImplemented();
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}
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void EmitWriteGlobalS8(EmitContext&) {
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NotImplemented();
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}
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void EmitWriteGlobalU16(EmitContext&) {
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NotImplemented();
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}
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void EmitWriteGlobalS16(EmitContext&) {
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NotImplemented();
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}
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void EmitWriteGlobal32(EmitContext& ctx, std::string_view address, std::string_view value) {
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if (ctx.profile.support_int64) {
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return ctx.Add("WriteGlobal32({},{});", address, value);
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}
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LOG_WARNING(Shader_GLSL, "Int64 not supported, ignoring memory operation");
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}
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void EmitWriteGlobal64(EmitContext& ctx, std::string_view address, std::string_view value) {
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if (ctx.profile.support_int64) {
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return ctx.Add("WriteGlobal64({},{});", address, value);
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}
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LOG_WARNING(Shader_GLSL, "Int64 not supported, ignoring memory operation");
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}
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void EmitWriteGlobal128(EmitContext& ctx, std::string_view address, std::string_view value) {
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if (ctx.profile.support_int64) {
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return ctx.Add("WriteGlobal128({},{});", address, value);
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}
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LOG_WARNING(Shader_GLSL, "Int64 not supported, ignoring memory operation");
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}
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void EmitLoadStorageU8(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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const IR::Value& offset) {
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const auto offset_var{ctx.var_alloc.Consume(offset)};
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ctx.AddU32("{}=bitfieldExtract({}_ssbo{}[{}>>2],int({}%4)*8,8);", inst, ctx.stage_name,
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binding.U32(), offset_var, offset_var);
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}
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void EmitLoadStorageS8(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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const IR::Value& offset) {
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const auto offset_var{ctx.var_alloc.Consume(offset)};
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ctx.AddU32("{}=bitfieldExtract(int({}_ssbo{}[{}>>2]),int({}%4)*8,8);", inst, ctx.stage_name,
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binding.U32(), offset_var, offset_var);
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}
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void EmitLoadStorageU16(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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const IR::Value& offset) {
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const auto offset_var{ctx.var_alloc.Consume(offset)};
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ctx.AddU32("{}=bitfieldExtract({}_ssbo{}[{}>>2],int(({}>>1)%2)*16,16);", inst, ctx.stage_name,
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binding.U32(), offset_var, offset_var);
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}
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void EmitLoadStorageS16(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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const IR::Value& offset) {
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const auto offset_var{ctx.var_alloc.Consume(offset)};
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ctx.AddU32("{}=bitfieldExtract(int({}_ssbo{}[{}>>2]),int(({}>>1)%2)*16,16);", inst,
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ctx.stage_name, binding.U32(), offset_var, offset_var);
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}
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void EmitLoadStorage32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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const IR::Value& offset) {
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const auto offset_var{ctx.var_alloc.Consume(offset)};
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ctx.AddU32("{}={}_ssbo{}[{}>>2];", inst, ctx.stage_name, binding.U32(), offset_var);
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}
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void EmitLoadStorage64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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const IR::Value& offset) {
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const auto offset_var{ctx.var_alloc.Consume(offset)};
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ctx.AddU32x2("{}=uvec2({}_ssbo{}[{}>>2],{}_ssbo{}[({}+4)>>2]);", inst, ctx.stage_name,
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binding.U32(), offset_var, ctx.stage_name, binding.U32(), offset_var);
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}
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void EmitLoadStorage128(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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const IR::Value& offset) {
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const auto offset_var{ctx.var_alloc.Consume(offset)};
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ctx.AddU32x4("{}=uvec4({}_ssbo{}[{}>>2],{}_ssbo{}[({}+4)>>2],{}_ssbo{}[({}+8)>>2],{}_ssbo{}[({}"
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"+12)>>2]);",
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inst, ctx.stage_name, binding.U32(), offset_var, ctx.stage_name, binding.U32(),
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offset_var, ctx.stage_name, binding.U32(), offset_var, ctx.stage_name,
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binding.U32(), offset_var);
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}
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void EmitWriteStorageU8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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std::string_view value) {
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const auto offset_var{ctx.var_alloc.Consume(offset)};
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const auto bit_offset{fmt::format("int({}%4)*8", offset_var)};
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SsboWriteCas(ctx, binding, offset_var, value, bit_offset, 8);
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}
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void EmitWriteStorageS8(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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std::string_view value) {
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const auto offset_var{ctx.var_alloc.Consume(offset)};
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const auto bit_offset{fmt::format("int({}%4)*8", offset_var)};
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SsboWriteCas(ctx, binding, offset_var, value, bit_offset, 8);
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}
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void EmitWriteStorageU16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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std::string_view value) {
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const auto offset_var{ctx.var_alloc.Consume(offset)};
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const auto bit_offset{fmt::format("int(({}>>1)%2)*16", offset_var)};
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SsboWriteCas(ctx, binding, offset_var, value, bit_offset, 16);
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}
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void EmitWriteStorageS16(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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std::string_view value) {
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const auto offset_var{ctx.var_alloc.Consume(offset)};
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const auto bit_offset{fmt::format("int(({}>>1)%2)*16", offset_var)};
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SsboWriteCas(ctx, binding, offset_var, value, bit_offset, 16);
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}
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void EmitWriteStorage32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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std::string_view value) {
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const auto offset_var{ctx.var_alloc.Consume(offset)};
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ctx.Add("{}_ssbo{}[{}>>2]={};", ctx.stage_name, binding.U32(), offset_var, value);
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}
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void EmitWriteStorage64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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std::string_view value) {
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const auto offset_var{ctx.var_alloc.Consume(offset)};
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ctx.Add("{}_ssbo{}[{}>>2]={}.x;", ctx.stage_name, binding.U32(), offset_var, value);
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ctx.Add("{}_ssbo{}[({}+4)>>2]={}.y;", ctx.stage_name, binding.U32(), offset_var, value);
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}
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void EmitWriteStorage128(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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std::string_view value) {
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const auto offset_var{ctx.var_alloc.Consume(offset)};
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ctx.Add("{}_ssbo{}[{}>>2]={}.x;", ctx.stage_name, binding.U32(), offset_var, value);
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ctx.Add("{}_ssbo{}[({}+4)>>2]={}.y;", ctx.stage_name, binding.U32(), offset_var, value);
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ctx.Add("{}_ssbo{}[({}+8)>>2]={}.z;", ctx.stage_name, binding.U32(), offset_var, value);
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ctx.Add("{}_ssbo{}[({}+12)>>2]={}.w;", ctx.stage_name, binding.U32(), offset_var, value);
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}
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} // namespace Shader::Backend::GLSL
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