mirror of
https://github.com/yuzu-emu/yuzu.git
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e3608578e4
shader: Implement S2R Tid{XYZ} and CtaId{XYZ}
887 lines
33 KiB
C++
887 lines
33 KiB
C++
// Copyright 2018 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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#include <array>
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#include <cstring>
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#include <map>
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#include <optional>
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#include <set>
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#include <string>
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#include <tuple>
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#include <variant>
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#include <vector>
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#include "common/common_types.h"
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#include "video_core/engines/maxwell_3d.h"
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#include "video_core/engines/shader_bytecode.h"
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#include "video_core/engines/shader_header.h"
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namespace VideoCommon::Shader {
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class OperationNode;
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class ConditionalNode;
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class GprNode;
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class ImmediateNode;
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class InternalFlagNode;
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class PredicateNode;
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class AbufNode; ///< Attribute buffer
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class CbufNode; ///< Constant buffer
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class LmemNode; ///< Local memory
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class GmemNode; ///< Global memory
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class CommentNode;
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using ProgramCode = std::vector<u64>;
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using NodeData =
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std::variant<OperationNode, ConditionalNode, GprNode, ImmediateNode, InternalFlagNode,
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PredicateNode, AbufNode, CbufNode, LmemNode, GmemNode, CommentNode>;
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using Node = const NodeData*;
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using Node4 = std::array<Node, 4>;
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using NodeBlock = std::vector<Node>;
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constexpr u32 MAX_PROGRAM_LENGTH = 0x1000;
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enum class OperationCode {
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Assign, /// (float& dest, float src) -> void
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Select, /// (MetaArithmetic, bool pred, float a, float b) -> float
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FAdd, /// (MetaArithmetic, float a, float b) -> float
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FMul, /// (MetaArithmetic, float a, float b) -> float
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FDiv, /// (MetaArithmetic, float a, float b) -> float
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FFma, /// (MetaArithmetic, float a, float b, float c) -> float
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FNegate, /// (MetaArithmetic, float a) -> float
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FAbsolute, /// (MetaArithmetic, float a) -> float
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FClamp, /// (MetaArithmetic, float value, float min, float max) -> float
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FMin, /// (MetaArithmetic, float a, float b) -> float
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FMax, /// (MetaArithmetic, float a, float b) -> float
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FCos, /// (MetaArithmetic, float a) -> float
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FSin, /// (MetaArithmetic, float a) -> float
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FExp2, /// (MetaArithmetic, float a) -> float
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FLog2, /// (MetaArithmetic, float a) -> float
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FInverseSqrt, /// (MetaArithmetic, float a) -> float
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FSqrt, /// (MetaArithmetic, float a) -> float
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FRoundEven, /// (MetaArithmetic, float a) -> float
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FFloor, /// (MetaArithmetic, float a) -> float
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FCeil, /// (MetaArithmetic, float a) -> float
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FTrunc, /// (MetaArithmetic, float a) -> float
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FCastInteger, /// (MetaArithmetic, int a) -> float
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FCastUInteger, /// (MetaArithmetic, uint a) -> float
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IAdd, /// (MetaArithmetic, int a, int b) -> int
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IMul, /// (MetaArithmetic, int a, int b) -> int
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IDiv, /// (MetaArithmetic, int a, int b) -> int
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INegate, /// (MetaArithmetic, int a) -> int
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IAbsolute, /// (MetaArithmetic, int a) -> int
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IMin, /// (MetaArithmetic, int a, int b) -> int
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IMax, /// (MetaArithmetic, int a, int b) -> int
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ICastFloat, /// (MetaArithmetic, float a) -> int
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ICastUnsigned, /// (MetaArithmetic, uint a) -> int
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ILogicalShiftLeft, /// (MetaArithmetic, int a, uint b) -> int
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ILogicalShiftRight, /// (MetaArithmetic, int a, uint b) -> int
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IArithmeticShiftRight, /// (MetaArithmetic, int a, uint b) -> int
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IBitwiseAnd, /// (MetaArithmetic, int a, int b) -> int
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IBitwiseOr, /// (MetaArithmetic, int a, int b) -> int
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IBitwiseXor, /// (MetaArithmetic, int a, int b) -> int
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IBitwiseNot, /// (MetaArithmetic, int a) -> int
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IBitfieldInsert, /// (MetaArithmetic, int base, int insert, int offset, int bits) -> int
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IBitfieldExtract, /// (MetaArithmetic, int value, int offset, int offset) -> int
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IBitCount, /// (MetaArithmetic, int) -> int
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UAdd, /// (MetaArithmetic, uint a, uint b) -> uint
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UMul, /// (MetaArithmetic, uint a, uint b) -> uint
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UDiv, /// (MetaArithmetic, uint a, uint b) -> uint
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UMin, /// (MetaArithmetic, uint a, uint b) -> uint
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UMax, /// (MetaArithmetic, uint a, uint b) -> uint
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UCastFloat, /// (MetaArithmetic, float a) -> uint
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UCastSigned, /// (MetaArithmetic, int a) -> uint
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ULogicalShiftLeft, /// (MetaArithmetic, uint a, uint b) -> uint
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ULogicalShiftRight, /// (MetaArithmetic, uint a, uint b) -> uint
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UArithmeticShiftRight, /// (MetaArithmetic, uint a, uint b) -> uint
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UBitwiseAnd, /// (MetaArithmetic, uint a, uint b) -> uint
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UBitwiseOr, /// (MetaArithmetic, uint a, uint b) -> uint
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UBitwiseXor, /// (MetaArithmetic, uint a, uint b) -> uint
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UBitwiseNot, /// (MetaArithmetic, uint a) -> uint
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UBitfieldInsert, /// (MetaArithmetic, uint base, uint insert, int offset, int bits) -> uint
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UBitfieldExtract, /// (MetaArithmetic, uint value, int offset, int offset) -> uint
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UBitCount, /// (MetaArithmetic, uint) -> uint
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HAdd, /// (MetaArithmetic, f16vec2 a, f16vec2 b) -> f16vec2
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HMul, /// (MetaArithmetic, f16vec2 a, f16vec2 b) -> f16vec2
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HFma, /// (MetaArithmetic, f16vec2 a, f16vec2 b, f16vec2 c) -> f16vec2
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HAbsolute, /// (f16vec2 a) -> f16vec2
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HNegate, /// (f16vec2 a, bool first, bool second) -> f16vec2
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HClamp, /// (f16vec2 src, float min, float max) -> f16vec2
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HUnpack, /// (Tegra::Shader::HalfType, T value) -> f16vec2
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HMergeF32, /// (f16vec2 src) -> float
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HMergeH0, /// (f16vec2 dest, f16vec2 src) -> f16vec2
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HMergeH1, /// (f16vec2 dest, f16vec2 src) -> f16vec2
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HPack2, /// (float a, float b) -> f16vec2
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LogicalAssign, /// (bool& dst, bool src) -> void
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LogicalAnd, /// (bool a, bool b) -> bool
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LogicalOr, /// (bool a, bool b) -> bool
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LogicalXor, /// (bool a, bool b) -> bool
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LogicalNegate, /// (bool a) -> bool
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LogicalPick2, /// (bool2 pair, uint index) -> bool
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LogicalAll2, /// (bool2 a) -> bool
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LogicalAny2, /// (bool2 a) -> bool
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LogicalFLessThan, /// (float a, float b) -> bool
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LogicalFEqual, /// (float a, float b) -> bool
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LogicalFLessEqual, /// (float a, float b) -> bool
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LogicalFGreaterThan, /// (float a, float b) -> bool
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LogicalFNotEqual, /// (float a, float b) -> bool
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LogicalFGreaterEqual, /// (float a, float b) -> bool
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LogicalFIsNan, /// (float a) -> bool
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LogicalILessThan, /// (int a, int b) -> bool
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LogicalIEqual, /// (int a, int b) -> bool
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LogicalILessEqual, /// (int a, int b) -> bool
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LogicalIGreaterThan, /// (int a, int b) -> bool
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LogicalINotEqual, /// (int a, int b) -> bool
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LogicalIGreaterEqual, /// (int a, int b) -> bool
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LogicalULessThan, /// (uint a, uint b) -> bool
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LogicalUEqual, /// (uint a, uint b) -> bool
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LogicalULessEqual, /// (uint a, uint b) -> bool
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LogicalUGreaterThan, /// (uint a, uint b) -> bool
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LogicalUNotEqual, /// (uint a, uint b) -> bool
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LogicalUGreaterEqual, /// (uint a, uint b) -> bool
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Logical2HLessThan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
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Logical2HEqual, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
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Logical2HLessEqual, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
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Logical2HGreaterThan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
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Logical2HNotEqual, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
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Logical2HGreaterEqual, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
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Logical2HLessThanWithNan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
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Logical2HEqualWithNan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
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Logical2HLessEqualWithNan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
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Logical2HGreaterThanWithNan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
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Logical2HNotEqualWithNan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
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Logical2HGreaterEqualWithNan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
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Texture, /// (MetaTexture, float[N] coords) -> float4
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TextureLod, /// (MetaTexture, float[N] coords) -> float4
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TextureGather, /// (MetaTexture, float[N] coords) -> float4
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TextureQueryDimensions, /// (MetaTexture, float a) -> float4
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TextureQueryLod, /// (MetaTexture, float[N] coords) -> float4
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TexelFetch, /// (MetaTexture, int[N], int) -> float4
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Branch, /// (uint branch_target) -> void
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PushFlowStack, /// (uint branch_target) -> void
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PopFlowStack, /// () -> void
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Exit, /// () -> void
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Discard, /// () -> void
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EmitVertex, /// () -> void
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EndPrimitive, /// () -> void
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YNegate, /// () -> float
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LocalInvocationIdX, /// () -> uint
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LocalInvocationIdY, /// () -> uint
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LocalInvocationIdZ, /// () -> uint
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WorkGroupIdX, /// () -> uint
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WorkGroupIdY, /// () -> uint
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WorkGroupIdZ, /// () -> uint
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Amount,
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};
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enum class InternalFlag {
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Zero = 0,
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Sign = 1,
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Carry = 2,
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Overflow = 3,
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Amount = 4,
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};
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/// Describes the behaviour of code path of a given entry point and a return point.
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enum class ExitMethod {
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Undetermined, ///< Internal value. Only occur when analyzing JMP loop.
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AlwaysReturn, ///< All code paths reach the return point.
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Conditional, ///< Code path reaches the return point or an END instruction conditionally.
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AlwaysEnd, ///< All code paths reach a END instruction.
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};
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class Sampler {
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public:
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// Use this constructor for bounded Samplers
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explicit Sampler(std::size_t offset, std::size_t index, Tegra::Shader::TextureType type,
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bool is_array, bool is_shadow)
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: offset{offset}, index{index}, type{type}, is_array{is_array}, is_shadow{is_shadow},
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is_bindless{false} {}
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// Use this constructor for bindless Samplers
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explicit Sampler(u32 cbuf_index, u32 cbuf_offset, std::size_t index,
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Tegra::Shader::TextureType type, bool is_array, bool is_shadow)
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: offset{(static_cast<u64>(cbuf_index) << 32) | cbuf_offset}, index{index}, type{type},
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is_array{is_array}, is_shadow{is_shadow}, is_bindless{true} {}
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// Use this only for serialization/deserialization
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explicit Sampler(std::size_t offset, std::size_t index, Tegra::Shader::TextureType type,
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bool is_array, bool is_shadow, bool is_bindless)
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: offset{offset}, index{index}, type{type}, is_array{is_array}, is_shadow{is_shadow},
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is_bindless{is_bindless} {}
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std::size_t GetOffset() const {
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return offset;
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}
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std::size_t GetIndex() const {
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return index;
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}
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Tegra::Shader::TextureType GetType() const {
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return type;
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}
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bool IsArray() const {
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return is_array;
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}
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bool IsShadow() const {
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return is_shadow;
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}
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bool IsBindless() const {
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return is_bindless;
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}
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std::pair<u32, u32> GetBindlessCBuf() const {
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return {static_cast<u32>(offset >> 32), static_cast<u32>(offset)};
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}
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bool operator<(const Sampler& rhs) const {
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return std::tie(index, offset, type, is_array, is_shadow, is_bindless) <
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std::tie(rhs.index, rhs.offset, rhs.type, rhs.is_array, rhs.is_shadow,
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rhs.is_bindless);
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}
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private:
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/// Offset in TSC memory from which to read the sampler object, as specified by the sampling
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/// instruction.
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std::size_t offset{};
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std::size_t index{}; ///< Value used to index into the generated GLSL sampler array.
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Tegra::Shader::TextureType type{}; ///< The type used to sample this texture (Texture2D, etc)
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bool is_array{}; ///< Whether the texture is being sampled as an array texture or not.
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bool is_shadow{}; ///< Whether the texture is being sampled as a depth texture or not.
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bool is_bindless{}; ///< Whether this sampler belongs to a bindless texture or not.
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};
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class ConstBuffer {
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public:
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explicit ConstBuffer(u32 max_offset, bool is_indirect)
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: max_offset{max_offset}, is_indirect{is_indirect} {}
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ConstBuffer() = default;
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void MarkAsUsed(u64 offset) {
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max_offset = std::max(max_offset, static_cast<u32>(offset));
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}
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void MarkAsUsedIndirect() {
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is_indirect = true;
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}
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bool IsIndirect() const {
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return is_indirect;
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}
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u32 GetSize() const {
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return max_offset + sizeof(float);
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}
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u32 GetMaxOffset() const {
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return max_offset;
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}
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private:
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u32 max_offset{};
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bool is_indirect{};
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};
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struct GlobalMemoryBase {
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u32 cbuf_index{};
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u32 cbuf_offset{};
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bool operator<(const GlobalMemoryBase& rhs) const {
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return std::tie(cbuf_index, cbuf_offset) < std::tie(rhs.cbuf_index, rhs.cbuf_offset);
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}
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};
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struct GlobalMemoryUsage {
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bool is_read{};
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bool is_written{};
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};
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struct MetaArithmetic {
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bool precise{};
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};
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struct MetaTexture {
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const Sampler& sampler;
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Node array{};
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Node depth_compare{};
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std::vector<Node> aoffi;
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Node bias{};
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Node lod{};
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Node component{};
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u32 element{};
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};
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constexpr MetaArithmetic PRECISE = {true};
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constexpr MetaArithmetic NO_PRECISE = {false};
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using Meta = std::variant<MetaArithmetic, MetaTexture, Tegra::Shader::HalfType>;
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/// Holds any kind of operation that can be done in the IR
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class OperationNode final {
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public:
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explicit OperationNode(OperationCode code) : code{code} {}
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explicit OperationNode(OperationCode code, Meta&& meta) : code{code}, meta{std::move(meta)} {}
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template <typename... T>
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explicit OperationNode(OperationCode code, const T*... operands)
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: OperationNode(code, {}, operands...) {}
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template <typename... T>
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explicit OperationNode(OperationCode code, Meta&& meta, const T*... operands_)
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: code{code}, meta{std::move(meta)}, operands{operands_...} {}
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explicit OperationNode(OperationCode code, Meta&& meta, std::vector<Node>&& operands)
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: code{code}, meta{meta}, operands{std::move(operands)} {}
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explicit OperationNode(OperationCode code, std::vector<Node>&& operands)
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: code{code}, operands{std::move(operands)} {}
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OperationCode GetCode() const {
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return code;
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}
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const Meta& GetMeta() const {
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return meta;
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}
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std::size_t GetOperandsCount() const {
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return operands.size();
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}
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Node operator[](std::size_t operand_index) const {
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return operands.at(operand_index);
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}
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private:
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const OperationCode code;
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const Meta meta;
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std::vector<Node> operands;
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};
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/// Encloses inside any kind of node that returns a boolean conditionally-executed code
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class ConditionalNode final {
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public:
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explicit ConditionalNode(Node condition, std::vector<Node>&& code)
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: condition{condition}, code{std::move(code)} {}
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Node GetCondition() const {
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return condition;
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}
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const std::vector<Node>& GetCode() const {
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return code;
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}
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private:
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const Node condition; ///< Condition to be satisfied
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std::vector<Node> code; ///< Code to execute
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};
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/// A general purpose register
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class GprNode final {
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public:
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explicit constexpr GprNode(Tegra::Shader::Register index) : index{index} {}
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u32 GetIndex() const {
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return static_cast<u32>(index);
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}
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private:
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const Tegra::Shader::Register index;
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};
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/// A 32-bits value that represents an immediate value
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class ImmediateNode final {
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public:
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explicit constexpr ImmediateNode(u32 value) : value{value} {}
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u32 GetValue() const {
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return value;
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}
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private:
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const u32 value;
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};
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/// One of Maxwell's internal flags
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class InternalFlagNode final {
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public:
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explicit constexpr InternalFlagNode(InternalFlag flag) : flag{flag} {}
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InternalFlag GetFlag() const {
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return flag;
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}
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private:
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const InternalFlag flag;
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};
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/// A predicate register, it can be negated without additional nodes
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class PredicateNode final {
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public:
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explicit constexpr PredicateNode(Tegra::Shader::Pred index, bool negated)
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: index{index}, negated{negated} {}
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Tegra::Shader::Pred GetIndex() const {
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return index;
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}
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bool IsNegated() const {
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return negated;
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}
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private:
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const Tegra::Shader::Pred index;
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const bool negated;
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};
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/// Attribute buffer memory (known as attributes or varyings in GLSL terms)
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class AbufNode final {
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public:
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// Initialize for standard attributes (index is explicit).
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explicit constexpr AbufNode(Tegra::Shader::Attribute::Index index, u32 element,
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Node buffer = {})
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: buffer{buffer}, index{index}, element{element} {}
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// Initialize for physical attributes (index is a variable value).
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explicit constexpr AbufNode(Node physical_address, Node buffer = {})
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: physical_address{physical_address}, buffer{buffer} {}
|
|
|
|
Tegra::Shader::Attribute::Index GetIndex() const {
|
|
return index;
|
|
}
|
|
|
|
u32 GetElement() const {
|
|
return element;
|
|
}
|
|
|
|
Node GetBuffer() const {
|
|
return buffer;
|
|
}
|
|
|
|
bool IsPhysicalBuffer() const {
|
|
return physical_address != nullptr;
|
|
}
|
|
|
|
Node GetPhysicalAddress() const {
|
|
return physical_address;
|
|
}
|
|
|
|
private:
|
|
Node physical_address{};
|
|
Node buffer{};
|
|
Tegra::Shader::Attribute::Index index{};
|
|
u32 element{};
|
|
};
|
|
|
|
/// Constant buffer node, usually mapped to uniform buffers in GLSL
|
|
class CbufNode final {
|
|
public:
|
|
explicit constexpr CbufNode(u32 index, Node offset) : index{index}, offset{offset} {}
|
|
|
|
u32 GetIndex() const {
|
|
return index;
|
|
}
|
|
|
|
Node GetOffset() const {
|
|
return offset;
|
|
}
|
|
|
|
private:
|
|
const u32 index;
|
|
const Node offset;
|
|
};
|
|
|
|
/// Local memory node
|
|
class LmemNode final {
|
|
public:
|
|
explicit constexpr LmemNode(Node address) : address{address} {}
|
|
|
|
Node GetAddress() const {
|
|
return address;
|
|
}
|
|
|
|
private:
|
|
const Node address;
|
|
};
|
|
|
|
/// Global memory node
|
|
class GmemNode final {
|
|
public:
|
|
explicit constexpr GmemNode(Node real_address, Node base_address,
|
|
const GlobalMemoryBase& descriptor)
|
|
: real_address{real_address}, base_address{base_address}, descriptor{descriptor} {}
|
|
|
|
Node GetRealAddress() const {
|
|
return real_address;
|
|
}
|
|
|
|
Node GetBaseAddress() const {
|
|
return base_address;
|
|
}
|
|
|
|
const GlobalMemoryBase& GetDescriptor() const {
|
|
return descriptor;
|
|
}
|
|
|
|
private:
|
|
const Node real_address;
|
|
const Node base_address;
|
|
const GlobalMemoryBase descriptor;
|
|
};
|
|
|
|
/// Commentary, can be dropped
|
|
class CommentNode final {
|
|
public:
|
|
explicit CommentNode(std::string text) : text{std::move(text)} {}
|
|
|
|
const std::string& GetText() const {
|
|
return text;
|
|
}
|
|
|
|
private:
|
|
std::string text;
|
|
};
|
|
|
|
class ShaderIR final {
|
|
public:
|
|
explicit ShaderIR(const ProgramCode& program_code, u32 main_offset);
|
|
~ShaderIR();
|
|
|
|
const std::map<u32, NodeBlock>& GetBasicBlocks() const {
|
|
return basic_blocks;
|
|
}
|
|
|
|
const std::set<u32>& GetRegisters() const {
|
|
return used_registers;
|
|
}
|
|
|
|
const std::set<Tegra::Shader::Pred>& GetPredicates() const {
|
|
return used_predicates;
|
|
}
|
|
|
|
const std::set<Tegra::Shader::Attribute::Index>& GetInputAttributes() const {
|
|
return used_input_attributes;
|
|
}
|
|
|
|
const std::set<Tegra::Shader::Attribute::Index>& GetOutputAttributes() const {
|
|
return used_output_attributes;
|
|
}
|
|
|
|
const std::map<u32, ConstBuffer>& GetConstantBuffers() const {
|
|
return used_cbufs;
|
|
}
|
|
|
|
const std::set<Sampler>& GetSamplers() const {
|
|
return used_samplers;
|
|
}
|
|
|
|
const std::array<bool, Tegra::Engines::Maxwell3D::Regs::NumClipDistances>& GetClipDistances()
|
|
const {
|
|
return used_clip_distances;
|
|
}
|
|
|
|
const std::map<GlobalMemoryBase, GlobalMemoryUsage>& GetGlobalMemory() const {
|
|
return used_global_memory;
|
|
}
|
|
|
|
std::size_t GetLength() const {
|
|
return static_cast<std::size_t>(coverage_end * sizeof(u64));
|
|
}
|
|
|
|
bool HasPhysicalAttributes() const {
|
|
return uses_physical_attributes;
|
|
}
|
|
|
|
const Tegra::Shader::Header& GetHeader() const {
|
|
return header;
|
|
}
|
|
|
|
private:
|
|
void Decode();
|
|
|
|
ExitMethod Scan(u32 begin, u32 end, std::set<u32>& labels);
|
|
|
|
NodeBlock DecodeRange(u32 begin, u32 end);
|
|
|
|
/**
|
|
* Decodes a single instruction from Tegra to IR.
|
|
* @param bb Basic block where the nodes will be written to.
|
|
* @param pc Program counter. Offset to decode.
|
|
* @return Next address to decode.
|
|
*/
|
|
u32 DecodeInstr(NodeBlock& bb, u32 pc);
|
|
|
|
u32 DecodeArithmetic(NodeBlock& bb, u32 pc);
|
|
u32 DecodeArithmeticImmediate(NodeBlock& bb, u32 pc);
|
|
u32 DecodeBfe(NodeBlock& bb, u32 pc);
|
|
u32 DecodeBfi(NodeBlock& bb, u32 pc);
|
|
u32 DecodeShift(NodeBlock& bb, u32 pc);
|
|
u32 DecodeArithmeticInteger(NodeBlock& bb, u32 pc);
|
|
u32 DecodeArithmeticIntegerImmediate(NodeBlock& bb, u32 pc);
|
|
u32 DecodeArithmeticHalf(NodeBlock& bb, u32 pc);
|
|
u32 DecodeArithmeticHalfImmediate(NodeBlock& bb, u32 pc);
|
|
u32 DecodeFfma(NodeBlock& bb, u32 pc);
|
|
u32 DecodeHfma2(NodeBlock& bb, u32 pc);
|
|
u32 DecodeConversion(NodeBlock& bb, u32 pc);
|
|
u32 DecodeMemory(NodeBlock& bb, u32 pc);
|
|
u32 DecodeTexture(NodeBlock& bb, u32 pc);
|
|
u32 DecodeFloatSetPredicate(NodeBlock& bb, u32 pc);
|
|
u32 DecodeIntegerSetPredicate(NodeBlock& bb, u32 pc);
|
|
u32 DecodeHalfSetPredicate(NodeBlock& bb, u32 pc);
|
|
u32 DecodePredicateSetRegister(NodeBlock& bb, u32 pc);
|
|
u32 DecodePredicateSetPredicate(NodeBlock& bb, u32 pc);
|
|
u32 DecodeRegisterSetPredicate(NodeBlock& bb, u32 pc);
|
|
u32 DecodeFloatSet(NodeBlock& bb, u32 pc);
|
|
u32 DecodeIntegerSet(NodeBlock& bb, u32 pc);
|
|
u32 DecodeHalfSet(NodeBlock& bb, u32 pc);
|
|
u32 DecodeVideo(NodeBlock& bb, u32 pc);
|
|
u32 DecodeXmad(NodeBlock& bb, u32 pc);
|
|
u32 DecodeOther(NodeBlock& bb, u32 pc);
|
|
|
|
/// Internalizes node's data and returns a managed pointer to a clone of that node
|
|
Node StoreNode(NodeData&& node_data);
|
|
|
|
/// Creates a conditional node
|
|
Node Conditional(Node condition, std::vector<Node>&& code);
|
|
/// Creates a commentary
|
|
Node Comment(std::string text);
|
|
/// Creates an u32 immediate
|
|
Node Immediate(u32 value);
|
|
/// Creates a s32 immediate
|
|
Node Immediate(s32 value) {
|
|
return Immediate(static_cast<u32>(value));
|
|
}
|
|
/// Creates a f32 immediate
|
|
Node Immediate(f32 value) {
|
|
u32 integral;
|
|
std::memcpy(&integral, &value, sizeof(u32));
|
|
return Immediate(integral);
|
|
}
|
|
|
|
/// Generates a node for a passed register.
|
|
Node GetRegister(Tegra::Shader::Register reg);
|
|
/// Generates a node representing a 19-bit immediate value
|
|
Node GetImmediate19(Tegra::Shader::Instruction instr);
|
|
/// Generates a node representing a 32-bit immediate value
|
|
Node GetImmediate32(Tegra::Shader::Instruction instr);
|
|
/// Generates a node representing a constant buffer
|
|
Node GetConstBuffer(u64 index, u64 offset);
|
|
/// Generates a node representing a constant buffer with a variadic offset
|
|
Node GetConstBufferIndirect(u64 index, u64 offset, Node node);
|
|
/// Generates a node for a passed predicate. It can be optionally negated
|
|
Node GetPredicate(u64 pred, bool negated = false);
|
|
/// Generates a predicate node for an immediate true or false value
|
|
Node GetPredicate(bool immediate);
|
|
/// Generates a node representing an input attribute. Keeps track of used attributes.
|
|
Node GetInputAttribute(Tegra::Shader::Attribute::Index index, u64 element, Node buffer = {});
|
|
/// Generates a node representing a physical input attribute.
|
|
Node GetPhysicalInputAttribute(Tegra::Shader::Register physical_address, Node buffer = {});
|
|
/// Generates a node representing an output attribute. Keeps track of used attributes.
|
|
Node GetOutputAttribute(Tegra::Shader::Attribute::Index index, u64 element, Node buffer);
|
|
/// Generates a node representing an internal flag
|
|
Node GetInternalFlag(InternalFlag flag, bool negated = false);
|
|
/// Generates a node representing a local memory address
|
|
Node GetLocalMemory(Node address);
|
|
/// Generates a temporal, internally it uses a post-RZ register
|
|
Node GetTemporal(u32 id);
|
|
|
|
/// Sets a register. src value must be a number-evaluated node.
|
|
void SetRegister(NodeBlock& bb, Tegra::Shader::Register dest, Node src);
|
|
/// Sets a predicate. src value must be a bool-evaluated node
|
|
void SetPredicate(NodeBlock& bb, u64 dest, Node src);
|
|
/// Sets an internal flag. src value must be a bool-evaluated node
|
|
void SetInternalFlag(NodeBlock& bb, InternalFlag flag, Node value);
|
|
/// Sets a local memory address. address and value must be a number-evaluated node
|
|
void SetLocalMemory(NodeBlock& bb, Node address, Node value);
|
|
/// Sets a temporal. Internally it uses a post-RZ register
|
|
void SetTemporal(NodeBlock& bb, u32 id, Node value);
|
|
|
|
/// Sets internal flags from a float
|
|
void SetInternalFlagsFromFloat(NodeBlock& bb, Node value, bool sets_cc = true);
|
|
/// Sets internal flags from an integer
|
|
void SetInternalFlagsFromInteger(NodeBlock& bb, Node value, bool sets_cc = true);
|
|
|
|
/// Conditionally absolute/negated float. Absolute is applied first
|
|
Node GetOperandAbsNegFloat(Node value, bool absolute, bool negate);
|
|
/// Conditionally saturates a float
|
|
Node GetSaturatedFloat(Node value, bool saturate = true);
|
|
|
|
/// Converts an integer to different sizes.
|
|
Node ConvertIntegerSize(Node value, Tegra::Shader::Register::Size size, bool is_signed);
|
|
/// Conditionally absolute/negated integer. Absolute is applied first
|
|
Node GetOperandAbsNegInteger(Node value, bool absolute, bool negate, bool is_signed);
|
|
|
|
/// Unpacks a half immediate from an instruction
|
|
Node UnpackHalfImmediate(Tegra::Shader::Instruction instr, bool has_negation);
|
|
/// Unpacks a binary value into a half float pair with a type format
|
|
Node UnpackHalfFloat(Node value, Tegra::Shader::HalfType type);
|
|
/// Merges a half pair into another value
|
|
Node HalfMerge(Node dest, Node src, Tegra::Shader::HalfMerge merge);
|
|
/// Conditionally absolute/negated half float pair. Absolute is applied first
|
|
Node GetOperandAbsNegHalf(Node value, bool absolute, bool negate);
|
|
/// Conditionally saturates a half float pair
|
|
Node GetSaturatedHalfFloat(Node value, bool saturate = true);
|
|
|
|
/// Returns a predicate comparing two floats
|
|
Node GetPredicateComparisonFloat(Tegra::Shader::PredCondition condition, Node op_a, Node op_b);
|
|
/// Returns a predicate comparing two integers
|
|
Node GetPredicateComparisonInteger(Tegra::Shader::PredCondition condition, bool is_signed,
|
|
Node op_a, Node op_b);
|
|
/// Returns a predicate comparing two half floats. meta consumes how both pairs will be compared
|
|
Node GetPredicateComparisonHalf(Tegra::Shader::PredCondition condition, Node op_a, Node op_b);
|
|
|
|
/// Returns a predicate combiner operation
|
|
OperationCode GetPredicateCombiner(Tegra::Shader::PredOperation operation);
|
|
|
|
/// Returns a condition code evaluated from internal flags
|
|
Node GetConditionCode(Tegra::Shader::ConditionCode cc);
|
|
|
|
/// Accesses a texture sampler
|
|
const Sampler& GetSampler(const Tegra::Shader::Sampler& sampler,
|
|
Tegra::Shader::TextureType type, bool is_array, bool is_shadow);
|
|
|
|
// Accesses a texture sampler for a bindless texture.
|
|
const Sampler& GetBindlessSampler(const Tegra::Shader::Register& reg,
|
|
Tegra::Shader::TextureType type, bool is_array,
|
|
bool is_shadow);
|
|
|
|
/// Extracts a sequence of bits from a node
|
|
Node BitfieldExtract(Node value, u32 offset, u32 bits);
|
|
|
|
void WriteTexInstructionFloat(NodeBlock& bb, Tegra::Shader::Instruction instr,
|
|
const Node4& components);
|
|
|
|
void WriteTexsInstructionFloat(NodeBlock& bb, Tegra::Shader::Instruction instr,
|
|
const Node4& components);
|
|
void WriteTexsInstructionHalfFloat(NodeBlock& bb, Tegra::Shader::Instruction instr,
|
|
const Node4& components);
|
|
|
|
Node4 GetTexCode(Tegra::Shader::Instruction instr, Tegra::Shader::TextureType texture_type,
|
|
Tegra::Shader::TextureProcessMode process_mode, bool depth_compare,
|
|
bool is_array, bool is_aoffi,
|
|
std::optional<Tegra::Shader::Register> bindless_reg);
|
|
|
|
Node4 GetTexsCode(Tegra::Shader::Instruction instr, Tegra::Shader::TextureType texture_type,
|
|
Tegra::Shader::TextureProcessMode process_mode, bool depth_compare,
|
|
bool is_array);
|
|
|
|
Node4 GetTld4Code(Tegra::Shader::Instruction instr, Tegra::Shader::TextureType texture_type,
|
|
bool depth_compare, bool is_array, bool is_aoffi);
|
|
|
|
Node4 GetTldsCode(Tegra::Shader::Instruction instr, Tegra::Shader::TextureType texture_type,
|
|
bool is_array);
|
|
|
|
std::tuple<std::size_t, std::size_t> ValidateAndGetCoordinateElement(
|
|
Tegra::Shader::TextureType texture_type, bool depth_compare, bool is_array,
|
|
bool lod_bias_enabled, std::size_t max_coords, std::size_t max_inputs);
|
|
|
|
std::vector<Node> GetAoffiCoordinates(Node aoffi_reg, std::size_t coord_count, bool is_tld4);
|
|
|
|
Node4 GetTextureCode(Tegra::Shader::Instruction instr, Tegra::Shader::TextureType texture_type,
|
|
Tegra::Shader::TextureProcessMode process_mode, std::vector<Node> coords,
|
|
Node array, Node depth_compare, u32 bias_offset, std::vector<Node> aoffi,
|
|
std::optional<Tegra::Shader::Register> bindless_reg);
|
|
|
|
Node GetVideoOperand(Node op, bool is_chunk, bool is_signed, Tegra::Shader::VideoType type,
|
|
u64 byte_height);
|
|
|
|
void WriteLogicOperation(NodeBlock& bb, Tegra::Shader::Register dest,
|
|
Tegra::Shader::LogicOperation logic_op, Node op_a, Node op_b,
|
|
Tegra::Shader::PredicateResultMode predicate_mode,
|
|
Tegra::Shader::Pred predicate, bool sets_cc);
|
|
void WriteLop3Instruction(NodeBlock& bb, Tegra::Shader::Register dest, Node op_a, Node op_b,
|
|
Node op_c, Node imm_lut, bool sets_cc);
|
|
|
|
Node TrackCbuf(Node tracked, const NodeBlock& code, s64 cursor) const;
|
|
|
|
std::optional<u32> TrackImmediate(Node tracked, const NodeBlock& code, s64 cursor) const;
|
|
|
|
std::pair<Node, s64> TrackRegister(const GprNode* tracked, const NodeBlock& code,
|
|
s64 cursor) const;
|
|
|
|
std::tuple<Node, Node, GlobalMemoryBase> TrackAndGetGlobalMemory(
|
|
NodeBlock& bb, Tegra::Shader::Instruction instr, bool is_write);
|
|
|
|
template <typename... T>
|
|
Node Operation(OperationCode code, const T*... operands) {
|
|
return StoreNode(OperationNode(code, operands...));
|
|
}
|
|
|
|
template <typename... T>
|
|
Node Operation(OperationCode code, Meta&& meta, const T*... operands) {
|
|
return StoreNode(OperationNode(code, std::move(meta), operands...));
|
|
}
|
|
|
|
Node Operation(OperationCode code, std::vector<Node>&& operands) {
|
|
return StoreNode(OperationNode(code, std::move(operands)));
|
|
}
|
|
|
|
Node Operation(OperationCode code, Meta&& meta, std::vector<Node>&& operands) {
|
|
return StoreNode(OperationNode(code, std::move(meta), std::move(operands)));
|
|
}
|
|
|
|
template <typename... T>
|
|
Node SignedOperation(OperationCode code, bool is_signed, const T*... operands) {
|
|
return StoreNode(OperationNode(SignedToUnsignedCode(code, is_signed), operands...));
|
|
}
|
|
|
|
template <typename... T>
|
|
Node SignedOperation(OperationCode code, bool is_signed, Meta&& meta, const T*... operands) {
|
|
return StoreNode(
|
|
OperationNode(SignedToUnsignedCode(code, is_signed), std::move(meta), operands...));
|
|
}
|
|
|
|
static OperationCode SignedToUnsignedCode(OperationCode operation_code, bool is_signed);
|
|
|
|
const ProgramCode& program_code;
|
|
const u32 main_offset;
|
|
|
|
u32 coverage_begin{};
|
|
u32 coverage_end{};
|
|
std::map<std::pair<u32, u32>, ExitMethod> exit_method_map;
|
|
|
|
std::map<u32, NodeBlock> basic_blocks;
|
|
NodeBlock global_code;
|
|
|
|
std::vector<std::unique_ptr<NodeData>> stored_nodes;
|
|
|
|
std::set<u32> used_registers;
|
|
std::set<Tegra::Shader::Pred> used_predicates;
|
|
std::set<Tegra::Shader::Attribute::Index> used_input_attributes;
|
|
std::set<Tegra::Shader::Attribute::Index> used_output_attributes;
|
|
std::map<u32, ConstBuffer> used_cbufs;
|
|
std::set<Sampler> used_samplers;
|
|
std::array<bool, Tegra::Engines::Maxwell3D::Regs::NumClipDistances> used_clip_distances{};
|
|
std::map<GlobalMemoryBase, GlobalMemoryUsage> used_global_memory;
|
|
bool uses_physical_attributes{}; // Shader uses AL2P or physical attribute read/writes
|
|
|
|
Tegra::Shader::Header header;
|
|
};
|
|
|
|
} // namespace VideoCommon::Shader
|