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https://github.com/yuzu-emu/yuzu.git
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263 lines
13 KiB
C++
263 lines
13 KiB
C++
// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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#include <cstring>
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#include <type_traits>
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#include "shader_recompiler/frontend/ir/attribute.h"
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#include "shader_recompiler/frontend/ir/basic_block.h"
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#include "shader_recompiler/frontend/ir/modifiers.h"
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#include "shader_recompiler/frontend/ir/value.h"
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namespace Shader::IR {
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class IREmitter {
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public:
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explicit IREmitter(Block& block_) : block{&block_}, insertion_point{block->end()} {}
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explicit IREmitter(Block& block_, Block::iterator insertion_point_)
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: block{&block_}, insertion_point{insertion_point_} {}
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Block* block;
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[[nodiscard]] U1 Imm1(bool value) const;
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[[nodiscard]] U8 Imm8(u8 value) const;
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[[nodiscard]] U16 Imm16(u16 value) const;
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[[nodiscard]] U32 Imm32(u32 value) const;
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[[nodiscard]] U32 Imm32(s32 value) const;
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[[nodiscard]] F32 Imm32(f32 value) const;
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[[nodiscard]] U64 Imm64(u64 value) const;
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[[nodiscard]] U64 Imm64(s64 value) const;
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[[nodiscard]] F64 Imm64(f64 value) const;
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void Branch(Block* label);
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void BranchConditional(const U1& condition, Block* true_label, Block* false_label);
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void LoopMerge(Block* merge_block, Block* continue_target);
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void SelectionMerge(Block* merge_block);
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void Return();
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void DemoteToHelperInvocation(Block* continue_label);
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[[nodiscard]] U32 GetReg(IR::Reg reg);
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void SetReg(IR::Reg reg, const U32& value);
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[[nodiscard]] U1 GetPred(IR::Pred pred, bool is_negated = false);
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void SetPred(IR::Pred pred, const U1& value);
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[[nodiscard]] U1 GetGotoVariable(u32 id);
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void SetGotoVariable(u32 id, const U1& value);
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[[nodiscard]] U32 GetCbuf(const U32& binding, const U32& byte_offset);
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[[nodiscard]] UAny GetCbuf(const U32& binding, const U32& byte_offset, size_t bitsize,
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bool is_signed);
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[[nodiscard]] F32 GetFloatCbuf(const U32& binding, const U32& byte_offset);
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[[nodiscard]] U1 GetZFlag();
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[[nodiscard]] U1 GetSFlag();
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[[nodiscard]] U1 GetCFlag();
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[[nodiscard]] U1 GetOFlag();
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void SetZFlag(const U1& value);
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void SetSFlag(const U1& value);
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void SetCFlag(const U1& value);
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void SetOFlag(const U1& value);
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[[nodiscard]] U1 Condition(IR::Condition cond);
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[[nodiscard]] U1 GetFlowTestResult(FlowTest test);
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[[nodiscard]] F32 GetAttribute(IR::Attribute attribute);
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void SetAttribute(IR::Attribute attribute, const F32& value);
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void SetFragColor(u32 index, u32 component, const F32& value);
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void SetFragDepth(const F32& value);
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[[nodiscard]] U32 WorkgroupIdX();
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[[nodiscard]] U32 WorkgroupIdY();
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[[nodiscard]] U32 WorkgroupIdZ();
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[[nodiscard]] U32 LocalInvocationIdX();
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[[nodiscard]] U32 LocalInvocationIdY();
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[[nodiscard]] U32 LocalInvocationIdZ();
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[[nodiscard]] U32 LoadGlobalU8(const U64& address);
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[[nodiscard]] U32 LoadGlobalS8(const U64& address);
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[[nodiscard]] U32 LoadGlobalU16(const U64& address);
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[[nodiscard]] U32 LoadGlobalS16(const U64& address);
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[[nodiscard]] U32 LoadGlobal32(const U64& address);
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[[nodiscard]] Value LoadGlobal64(const U64& address);
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[[nodiscard]] Value LoadGlobal128(const U64& address);
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void WriteGlobalU8(const U64& address, const U32& value);
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void WriteGlobalS8(const U64& address, const U32& value);
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void WriteGlobalU16(const U64& address, const U32& value);
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void WriteGlobalS16(const U64& address, const U32& value);
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void WriteGlobal32(const U64& address, const U32& value);
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void WriteGlobal64(const U64& address, const IR::Value& vector);
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void WriteGlobal128(const U64& address, const IR::Value& vector);
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[[nodiscard]] U1 GetZeroFromOp(const Value& op);
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[[nodiscard]] U1 GetSignFromOp(const Value& op);
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[[nodiscard]] U1 GetCarryFromOp(const Value& op);
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[[nodiscard]] U1 GetOverflowFromOp(const Value& op);
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[[nodiscard]] U1 GetSparseFromOp(const Value& op);
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[[nodiscard]] Value CompositeConstruct(const Value& e1, const Value& e2);
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[[nodiscard]] Value CompositeConstruct(const Value& e1, const Value& e2, const Value& e3);
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[[nodiscard]] Value CompositeConstruct(const Value& e1, const Value& e2, const Value& e3,
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const Value& e4);
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[[nodiscard]] Value CompositeExtract(const Value& vector, size_t element);
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[[nodiscard]] Value CompositeInsert(const Value& vector, const Value& object, size_t element);
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[[nodiscard]] Value Select(const U1& condition, const Value& true_value,
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const Value& false_value);
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template <typename Dest, typename Source>
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[[nodiscard]] Dest BitCast(const Source& value);
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[[nodiscard]] U64 PackUint2x32(const Value& vector);
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[[nodiscard]] Value UnpackUint2x32(const U64& value);
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[[nodiscard]] U32 PackFloat2x16(const Value& vector);
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[[nodiscard]] Value UnpackFloat2x16(const U32& value);
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[[nodiscard]] U32 PackHalf2x16(const Value& vector);
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[[nodiscard]] Value UnpackHalf2x16(const U32& value);
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[[nodiscard]] F64 PackDouble2x32(const Value& vector);
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[[nodiscard]] Value UnpackDouble2x32(const F64& value);
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[[nodiscard]] F16F32F64 FPAdd(const F16F32F64& a, const F16F32F64& b, FpControl control = {});
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[[nodiscard]] F16F32F64 FPMul(const F16F32F64& a, const F16F32F64& b, FpControl control = {});
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[[nodiscard]] F16F32F64 FPFma(const F16F32F64& a, const F16F32F64& b, const F16F32F64& c,
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FpControl control = {});
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[[nodiscard]] F16F32F64 FPAbs(const F16F32F64& value);
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[[nodiscard]] F16F32F64 FPNeg(const F16F32F64& value);
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[[nodiscard]] F16F32F64 FPAbsNeg(const F16F32F64& value, bool abs, bool neg);
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[[nodiscard]] F32 FPCos(const F32& value);
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[[nodiscard]] F32 FPSin(const F32& value);
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[[nodiscard]] F32 FPExp2(const F32& value);
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[[nodiscard]] F32 FPLog2(const F32& value);
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[[nodiscard]] F32F64 FPRecip(const F32F64& value);
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[[nodiscard]] F32F64 FPRecipSqrt(const F32F64& value);
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[[nodiscard]] F32 FPSqrt(const F32& value);
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[[nodiscard]] F16F32F64 FPSaturate(const F16F32F64& value);
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[[nodiscard]] F16F32F64 FPRoundEven(const F16F32F64& value, FpControl control = {});
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[[nodiscard]] F16F32F64 FPFloor(const F16F32F64& value, FpControl control = {});
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[[nodiscard]] F16F32F64 FPCeil(const F16F32F64& value, FpControl control = {});
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[[nodiscard]] F16F32F64 FPTrunc(const F16F32F64& value, FpControl control = {});
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[[nodiscard]] U1 FPEqual(const F16F32F64& lhs, const F16F32F64& rhs, FpControl control = {},
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bool ordered = true);
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[[nodiscard]] U1 FPNotEqual(const F16F32F64& lhs, const F16F32F64& rhs, FpControl control = {},
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bool ordered = true);
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[[nodiscard]] U1 FPLessThan(const F16F32F64& lhs, const F16F32F64& rhs, FpControl control = {},
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bool ordered = true);
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[[nodiscard]] U1 FPGreaterThan(const F16F32F64& lhs, const F16F32F64& rhs,
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FpControl control = {}, bool ordered = true);
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[[nodiscard]] U1 FPLessThanEqual(const F16F32F64& lhs, const F16F32F64& rhs,
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FpControl control = {}, bool ordered = true);
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[[nodiscard]] U1 FPGreaterThanEqual(const F16F32F64& lhs, const F16F32F64& rhs,
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FpControl control = {}, bool ordered = true);
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[[nodiscard]] U1 FPIsNan(const F16F32F64& value);
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[[nodiscard]] U1 FPOrdered(const F16F32F64& lhs, const F16F32F64& rhs);
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[[nodiscard]] U1 FPUnordered(const F16F32F64& lhs, const F16F32F64& rhs);
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[[nodiscard]] F32F64 FPMax(const F32F64& lhs, const F32F64& rhs, FpControl control = {});
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[[nodiscard]] F32F64 FPMin(const F32F64& lhs, const F32F64& rhs, FpControl control = {});
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[[nodiscard]] U32U64 IAdd(const U32U64& a, const U32U64& b);
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[[nodiscard]] U32U64 ISub(const U32U64& a, const U32U64& b);
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[[nodiscard]] U32 IMul(const U32& a, const U32& b);
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[[nodiscard]] U32U64 INeg(const U32U64& value);
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[[nodiscard]] U32U64 IAbs(const U32U64& value);
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[[nodiscard]] U32U64 ShiftLeftLogical(const U32U64& base, const U32& shift);
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[[nodiscard]] U32U64 ShiftRightLogical(const U32U64& base, const U32& shift);
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[[nodiscard]] U32U64 ShiftRightArithmetic(const U32U64& base, const U32& shift);
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[[nodiscard]] U32 BitwiseAnd(const U32& a, const U32& b);
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[[nodiscard]] U32 BitwiseOr(const U32& a, const U32& b);
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[[nodiscard]] U32 BitwiseXor(const U32& a, const U32& b);
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[[nodiscard]] U32 BitFieldInsert(const U32& base, const U32& insert, const U32& offset,
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const U32& count);
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[[nodiscard]] U32 BitFieldExtract(const U32& base, const U32& offset, const U32& count,
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bool is_signed = false);
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[[nodiscard]] U32 BitReverse(const U32& value);
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[[nodiscard]] U32 BitCount(const U32& value);
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[[nodiscard]] U32 BitwiseNot(const U32& value);
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[[nodiscard]] U32 FindSMsb(const U32& value);
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[[nodiscard]] U32 FindUMsb(const U32& value);
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[[nodiscard]] U32 SMin(const U32& a, const U32& b);
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[[nodiscard]] U32 UMin(const U32& a, const U32& b);
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[[nodiscard]] U32 SMax(const U32& a, const U32& b);
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[[nodiscard]] U32 UMax(const U32& a, const U32& b);
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[[nodiscard]] U1 ILessThan(const U32& lhs, const U32& rhs, bool is_signed);
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[[nodiscard]] U1 IEqual(const U32U64& lhs, const U32U64& rhs);
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[[nodiscard]] U1 ILessThanEqual(const U32& lhs, const U32& rhs, bool is_signed);
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[[nodiscard]] U1 IGreaterThan(const U32& lhs, const U32& rhs, bool is_signed);
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[[nodiscard]] U1 INotEqual(const U32& lhs, const U32& rhs);
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[[nodiscard]] U1 IGreaterThanEqual(const U32& lhs, const U32& rhs, bool is_signed);
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[[nodiscard]] U1 LogicalOr(const U1& a, const U1& b);
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[[nodiscard]] U1 LogicalAnd(const U1& a, const U1& b);
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[[nodiscard]] U1 LogicalXor(const U1& a, const U1& b);
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[[nodiscard]] U1 LogicalNot(const U1& value);
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[[nodiscard]] U32U64 ConvertFToS(size_t bitsize, const F16F32F64& value);
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[[nodiscard]] U32U64 ConvertFToU(size_t bitsize, const F16F32F64& value);
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[[nodiscard]] U32U64 ConvertFToI(size_t bitsize, bool is_signed, const F16F32F64& value);
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[[nodiscard]] F16F32F64 ConvertSToF(size_t dest_bitsize, size_t src_bitsize,
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const Value& value);
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[[nodiscard]] F16F32F64 ConvertUToF(size_t dest_bitsize, size_t src_bitsize,
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const Value& value);
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[[nodiscard]] F16F32F64 ConvertIToF(size_t dest_bitsize, size_t src_bitsize, bool is_signed,
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const Value& value);
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[[nodiscard]] U32U64 UConvert(size_t result_bitsize, const U32U64& value);
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[[nodiscard]] F16F32F64 FPConvert(size_t result_bitsize, const F16F32F64& value);
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[[nodiscard]] Value ImageSampleImplicitLod(const Value& handle, const Value& coords,
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const F32& bias, const Value& offset,
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const F32& lod_clamp, TextureInstInfo info);
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[[nodiscard]] Value ImageSampleExplicitLod(const Value& handle, const Value& coords,
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const F32& lod, const Value& offset,
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const F32& lod_clamp, TextureInstInfo info);
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[[nodiscard]] F32 ImageSampleDrefImplicitLod(const Value& handle, const Value& coords,
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const F32& dref, const F32& bias,
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const Value& offset, const F32& lod_clamp,
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TextureInstInfo info);
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[[nodiscard]] F32 ImageSampleDrefExplicitLod(const Value& handle, const Value& coords,
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const F32& dref, const F32& lod,
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const Value& offset, const F32& lod_clamp,
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TextureInstInfo info);
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private:
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IR::Block::iterator insertion_point;
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template <typename T = Value, typename... Args>
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T Inst(Opcode op, Args... args) {
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auto it{block->PrependNewInst(insertion_point, op, {Value{args}...})};
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return T{Value{&*it}};
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}
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template <typename T>
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requires(sizeof(T) <= sizeof(u32) && std::is_trivially_copyable_v<T>) struct Flags {
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Flags() = default;
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Flags(T proxy_) : proxy{proxy_} {}
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T proxy;
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};
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template <typename T = Value, typename FlagType, typename... Args>
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T Inst(Opcode op, Flags<FlagType> flags, Args... args) {
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u32 raw_flags{};
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std::memcpy(&raw_flags, &flags.proxy, sizeof(flags.proxy));
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auto it{block->PrependNewInst(insertion_point, op, {Value{args}...}, raw_flags)};
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return T{Value{&*it}};
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}
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};
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} // namespace Shader::IR
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