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83 lines
2.7 KiB
C++
83 lines
2.7 KiB
C++
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include <bitset>
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#include "common/assert.h"
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#include "common/logging/log.h"
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#include "core/core.h"
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#include "video_core/engines/kepler_compute.h"
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#include "video_core/engines/maxwell_3d.h"
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#include "video_core/memory_manager.h"
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#include "video_core/rasterizer_interface.h"
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#include "video_core/textures/decoders.h"
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namespace Tegra::Engines {
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KeplerCompute::KeplerCompute(Core::System& system_, MemoryManager& memory_manager_)
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: system{system_}, memory_manager{memory_manager_}, upload_state{memory_manager, regs.upload} {}
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KeplerCompute::~KeplerCompute() = default;
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void KeplerCompute::BindRasterizer(VideoCore::RasterizerInterface* rasterizer_) {
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rasterizer = rasterizer_;
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upload_state.BindRasterizer(rasterizer);
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}
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void KeplerCompute::CallMethod(u32 method, u32 method_argument, bool is_last_call) {
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ASSERT_MSG(method < Regs::NUM_REGS,
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"Invalid KeplerCompute register, increase the size of the Regs structure");
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regs.reg_array[method] = method_argument;
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switch (method) {
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case KEPLER_COMPUTE_REG_INDEX(exec_upload): {
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upload_state.ProcessExec(regs.exec_upload.linear != 0);
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break;
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}
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case KEPLER_COMPUTE_REG_INDEX(data_upload): {
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upload_state.ProcessData(method_argument, is_last_call);
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if (is_last_call) {
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}
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break;
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}
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case KEPLER_COMPUTE_REG_INDEX(launch):
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ProcessLaunch();
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break;
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default:
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break;
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}
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}
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void KeplerCompute::CallMultiMethod(u32 method, const u32* base_start, u32 amount,
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u32 methods_pending) {
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for (std::size_t i = 0; i < amount; i++) {
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CallMethod(method, base_start[i], methods_pending - static_cast<u32>(i) <= 1);
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}
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}
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void KeplerCompute::ProcessLaunch() {
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const GPUVAddr launch_desc_loc = regs.launch_desc_loc.Address();
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memory_manager.ReadBlockUnsafe(launch_desc_loc, &launch_description,
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LaunchParams::NUM_LAUNCH_PARAMETERS * sizeof(u32));
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rasterizer->DispatchCompute();
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}
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Texture::TICEntry KeplerCompute::GetTICEntry(u32 tic_index) const {
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const GPUVAddr tic_address_gpu{regs.tic.Address() + tic_index * sizeof(Texture::TICEntry)};
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Texture::TICEntry tic_entry;
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memory_manager.ReadBlockUnsafe(tic_address_gpu, &tic_entry, sizeof(Texture::TICEntry));
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return tic_entry;
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}
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Texture::TSCEntry KeplerCompute::GetTSCEntry(u32 tsc_index) const {
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const GPUVAddr tsc_address_gpu{regs.tsc.Address() + tsc_index * sizeof(Texture::TSCEntry)};
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Texture::TSCEntry tsc_entry;
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memory_manager.ReadBlockUnsafe(tsc_address_gpu, &tsc_entry, sizeof(Texture::TSCEntry));
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return tsc_entry;
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}
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} // namespace Tegra::Engines
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