6 Commits

Author	SHA1	Message	Date
Weiyi Wang	6b81ceb060	common/bitfield: make it endianness-aware	2019-02-06 17:29:39 +01:00
fearlessTobi	63c2e32e20	Port #4182 from Citra: "Prefix all size_t with std::"	2018-09-15 15:21:06 +02:00
MerryMage	112351d557	common: Implement a ring buffer	2018-09-08 18:56:38 +01:00
Lioncash	62b0b83fd8	externals: Update catch to 2.3.0 ... Updates the library from 2.2.3 to 2.3.0	2018-08-07 19:26:13 -04:00
James Rowe	096be16636	Format: Run the new clang format on everything	2018-01-20 16:45:11 -07:00
wwylele	8a8c0f348b	Common: add ParamPackage	2017-03-01 23:30:57 +02:00