bunnei
05dc93399b
Merge pull request #528 from Subv/rg11b10f
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GPU: Implemented the R11FG11FB10F texture and rendertarget formats.
2018-06-06 00:22:54 -04:00
Subv
c531a92eda
GPU: Implemented the R11FG11FB10F texture and rendertarget formats.
2018-06-05 21:57:16 -05:00
Subv
14afc704d4
GPU: Fixed the compression factor for RGBA16F textures.
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They're not compressed.
2018-06-05 21:55:17 -05:00
bunnei
5fb99e6a16
Merge pull request #516 from Subv/f2i_r
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GPU: Implemented the F2I_R shader instruction.
2018-06-05 22:01:29 -04:00
bunnei
b54a72afc0
Merge pull request #520 from bunnei/shader-shl
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gl_shader_decompiler: Implement SHL instruction.
2018-06-05 10:08:42 -04:00
Subv
4b89348c00
GPU: Implemented the F2I_R shader instruction.
2018-06-04 22:06:50 -05:00
bunnei
8c99dd055c
Merge pull request #518 from Subv/incomplete_shaders
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GPU: Implemented predicated exit instructions in the shader programs.
2018-06-04 22:43:46 -04:00
bunnei
799e632ccb
gl_shader_decompiler: Fix typo with ISCADD instruction.
2018-06-04 22:41:10 -04:00
bunnei
c23c30c76f
gl_shader_decompiler: Implement SHL instruction.
2018-06-04 22:36:49 -04:00
bunnei
6ea1576513
gl_shader_decompiler: Implement PredCondition::NotEqual.
2018-06-04 22:00:47 -04:00
Subv
23b1e6eded
GPU: Implement the ISCADD shader instructions.
2018-06-04 20:17:41 -05:00
bunnei
e8bfff7b4b
Merge pull request #514 from Subv/lop32i
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GPU: Implemented the LOP32I instruction.
2018-06-04 20:48:15 -04:00
bunnei
f564822e78
Merge pull request #510 from Subv/isetp
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GPU: Implemented the ISETP_R and ISETP_C instructions
2018-06-04 20:47:11 -04:00
Subv
6cf6fa2842
GPU: Implement predicated exit instructions in the shader programs.
2018-06-04 19:18:11 -05:00
Subv
d27279092f
GPU: Take into account predicated exits when performing shader control flow analysis.
2018-06-04 19:14:23 -05:00
bunnei
37fd4e6d9b
Merge pull request #512 from Subv/fset
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GPU: Corrected the FSET and I2F instructions.
2018-06-04 19:04:20 -04:00
bunnei
cdd92dc692
Merge pull request #501 from Subv/shader_bra
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GPU: Partially implemented the bra shader instruction
2018-06-04 18:31:07 -04:00
bunnei
38d25a4cb2
Merge pull request #515 from Subv/viewport_fix
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GPU: Calculate the correct viewport dimensions based on the scale and translate registers.
2018-06-04 18:11:36 -04:00
Subv
2933521a08
GPU: Use the bf bit in FSET to determine whether to write 0xFFFFFFFF or 1.0f.
2018-06-04 16:41:28 -05:00
Subv
f6679ce422
GPU: Corrected the I2F_R implementation.
2018-06-04 16:41:27 -05:00
Subv
5d55403f94
GPU: Calculate the correct viewport dimensions based on the scale and translate registers.
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This is how nouveau calculates the viewport width and height. For some reason some games set 0xFFFF in the VIEWPORT_HORIZ and VIEWPORT_VERT registers, maybe those are a misnomer and actually refer to something else?
2018-06-04 16:36:54 -05:00
Subv
0c688b421c
GPU: Implemented the LOP32I instruction.
2018-06-04 13:56:31 -05:00
Subv
cb47abecc6
GLCache: Corrected a mismatch between storing compressed sizes and verifying the uncompressed alignment in GetSurface.
2018-06-04 13:01:53 -05:00
Subv
90cddf1996
GPU: Use explicit types when retrieving the uniform values for fsetp/fset and isetp instead of the type of an invalid output register.
2018-06-04 11:22:26 -05:00
Subv
7c181fd4f4
GPU: Implemented the ISETP_R and ISETP_C shader instructions.
2018-06-04 11:12:03 -05:00
Subv
b481d8a00d
GPU: Partially implemented the shader BRA instruction.
2018-06-03 22:26:36 -05:00
bunnei
1efcba346a
gl_shader_decompiler: Implement TEXS component mask.
2018-06-03 12:08:17 -04:00
bunnei
bb9d39b8fe
Merge pull request #494 from bunnei/shader-tex
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gl_shader_decompiler: Implement TEX, fixes for TEXS.
2018-06-03 12:05:38 -04:00
bunnei
27c0f9e02d
Merge pull request #495 from bunnei/improve-rro
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gl_shader_decompiler: Implement RRO as a register move.
2018-06-03 12:05:26 -04:00
bunnei
e54ea773fc
gl_shader_decompiler: Implement RRO as a register move.
2018-06-03 11:14:31 -04:00
Subv
99f9d47d16
GPU: Implemented the DXN1 (BC4) texture format.
2018-06-02 13:17:09 -05:00
bunnei
888eb345c0
gl_shader_decompiler: Implement TEX instruction.
2018-05-31 23:36:45 -04:00
bunnei
4c727d0ba8
gl_shader_decompiler: Support multi-destination for TEXS.
2018-05-31 22:57:32 -04:00
bunnei
49309b5848
gl_rasterizer_cache: Assert that component type is UNorm or format is RGBA16F.
2018-05-30 22:50:41 -04:00
bunnei
ca5a4a704b
gl_rasterizer_cache: Implement PixelFormat RGBA16F.
2018-05-30 22:24:07 -04:00
bunnei
15086a22be
Merge pull request #489 from Subv/vertexid
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Shaders: Implemented reading the gl_InstanceID and gl_VertexID variables in the vertex shader.
2018-05-30 14:10:48 -04:00
Subv
99f12b05fa
Shaders: Implemented reading the gl_InstanceID and gl_VertexID variables in the vertex shader.
2018-05-30 10:58:03 -05:00
Sebastian Valle
8df011a57f
Merge pull request #483 from bunnei/sonic
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Several GPU fixes to boot Sonic Mania
2018-05-30 07:31:46 -05:00
bunnei
6fcc7e9c36
gl_shader_decompiler: F2F_R instruction: Implement abs.
2018-05-29 23:52:54 -04:00
bunnei
68937a662d
gl_shader_decompiler: Partially implement F2F_R instruction.
2018-05-29 23:10:44 -04:00
Subv
734106dcb9
GPU: Implemented the R8 texture format (0x1D)
2018-05-29 21:49:37 -05:00
bunnei
0d843eaba6
gl_rasterize_cache: Invert order of tex format RGB565.
2018-05-29 22:16:18 -04:00
bunnei
d809f65827
Merge pull request #472 from bunnei/greater-equal
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gl_shader_decompiler: Implement GetPredicateComparison GreaterEqual.
2018-05-27 12:14:30 -04:00
bunnei
7f155ba713
Merge pull request #476 from Subv/a1bgr5
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GPU: Implemented the A1B5G5R5 texture format (0x14)
2018-05-27 12:14:08 -04:00
Subv
7ddc872b52
GPU: Implemented the A1B5G5R5 texture format (0x14)
2018-05-27 09:02:05 -05:00
bunnei
c23ce3365d
gl_shader_decompiler: Implement GetPredicateComparison GreaterEqual.
2018-05-25 23:21:29 -04:00
bunnei
ee53688ca7
shader_bytecode: Implement other variants of FMNMX.
2018-05-25 23:18:50 -04:00
Subv
e2cdf54177
Shader: Implemented compound predicates in fset.
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You can specify a predicate in the fset instruction:
Result = ((Value1 Comp Value2) OP P0) ? 1.0 : 0.0;
2018-05-24 17:39:59 -05:00
Subv
126270d963
Shader: Implemented compound predicates in fsetp.
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You can specify three predicates in an fsetp instruction:
P1 = (Value1 Comp Value2) OP P0;
P2 = !(Value1 Comp Value2) OP P0;
2018-05-24 17:22:36 -05:00
bunnei
898f0fa029
Merge pull request #458 from Subv/fmnmx
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Shaders: Implemented the FMNMX shader instruction.
2018-05-20 23:44:07 -04:00