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GPU: Move the Maxwell3D macro uploading code to the inside of the Maxwell3D processor.
It doesn't belong in the PFIFO handler.
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@ -24,9 +24,6 @@ namespace Tegra {
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enum class BufferMethods {
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BindObject = 0,
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SetGraphMacroCode = 0x45,
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SetGraphMacroCodeArg = 0x46,
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SetGraphMacroEntry = 0x47,
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CountBufferMethods = 0x40,
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};
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@ -36,28 +33,6 @@ void GPU::WriteReg(u32 method, u32 subchannel, u32 value, u32 remaining_params)
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"{:08X} remaining params {}",
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method, subchannel, value, remaining_params);
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if (method == static_cast<u32>(BufferMethods::SetGraphMacroEntry)) {
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// Prepare to upload a new macro, reset the upload counter.
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NGLOG_DEBUG(HW_GPU, "Uploading GPU macro {:08X}", value);
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current_macro_entry = value;
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current_macro_code.clear();
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return;
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}
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if (method == static_cast<u32>(BufferMethods::SetGraphMacroCodeArg)) {
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// Append a new code word to the current macro.
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current_macro_code.push_back(value);
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// There are no more params remaining, submit the code to the 3D engine.
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if (remaining_params == 0) {
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maxwell_3d->SubmitMacroCode(current_macro_entry, std::move(current_macro_code));
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current_macro_entry = InvalidGraphMacroEntry;
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current_macro_code.clear();
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}
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return;
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}
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if (method == static_cast<u32>(BufferMethods::BindObject)) {
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// Bind the current subchannel to the desired engine id.
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NGLOG_DEBUG(HW_GPU, "Binding subchannel {} to engine {}", subchannel, value);
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@ -22,10 +22,6 @@ constexpr u32 MacroRegistersStart = 0xE00;
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Maxwell3D::Maxwell3D(MemoryManager& memory_manager)
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: memory_manager(memory_manager), macro_interpreter(*this) {}
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void Maxwell3D::SubmitMacroCode(u32 entry, std::vector<u32> code) {
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uploaded_macros[entry * 2 + MacroRegistersStart] = std::move(code);
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}
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void Maxwell3D::CallMacroMethod(u32 method, std::vector<u32> parameters) {
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auto macro_code = uploaded_macros.find(method);
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// The requested macro must have been uploaded already.
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@ -75,6 +71,10 @@ void Maxwell3D::WriteReg(u32 method, u32 value, u32 remaining_params) {
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regs.reg_array[method] = value;
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switch (method) {
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case MAXWELL3D_REG_INDEX(macros.data): {
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ProcessMacroUpload(value);
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break;
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}
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case MAXWELL3D_REG_INDEX(code_address.code_address_high):
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case MAXWELL3D_REG_INDEX(code_address.code_address_low): {
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// Note: For some reason games (like Puyo Puyo Tetris) seem to write 0 to the CODE_ADDRESS
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@ -141,6 +141,12 @@ void Maxwell3D::WriteReg(u32 method, u32 value, u32 remaining_params) {
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}
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}
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void Maxwell3D::ProcessMacroUpload(u32 data) {
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// Store the uploaded macro code to interpret them when they're called.
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auto& macro = uploaded_macros[regs.macros.entry * 2 + MacroRegistersStart];
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macro.push_back(data);
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}
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void Maxwell3D::ProcessQueryGet() {
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GPUVAddr sequence_address = regs.query.QueryAddress();
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// Since the sequence address is given as a GPU VAddr, we have to convert it to an application
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@ -322,7 +322,15 @@ public:
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union {
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struct {
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INSERT_PADDING_WORDS(0x200);
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INSERT_PADDING_WORDS(0x45);
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struct {
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INSERT_PADDING_WORDS(1);
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u32 data;
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u32 entry;
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} macros;
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INSERT_PADDING_WORDS(0x1B8);
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struct {
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u32 address_high;
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@ -637,9 +645,6 @@ public:
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/// Write the value to the register identified by method.
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void WriteReg(u32 method, u32 value, u32 remaining_params);
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/// Uploads the code for a GPU macro program associated with the specified entry.
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void SubmitMacroCode(u32 entry, std::vector<u32> code);
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/// Returns a list of enabled textures for the specified shader stage.
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std::vector<Texture::FullTextureInfo> GetStageTextures(Regs::ShaderStage stage) const;
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@ -670,6 +675,9 @@ private:
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*/
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void CallMacroMethod(u32 method, std::vector<u32> parameters);
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/// Handles writes to the macro uploading registers.
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void ProcessMacroUpload(u32 data);
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/// Handles a write to the QUERY_GET register.
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void ProcessQueryGet();
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@ -687,6 +695,7 @@ private:
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static_assert(offsetof(Maxwell3D::Regs, field_name) == position * 4, \
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"Field " #field_name " has invalid position")
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ASSERT_REG_POSITION(macros, 0x45);
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ASSERT_REG_POSITION(rt, 0x200);
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ASSERT_REG_POSITION(viewport_transform[0], 0x280);
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ASSERT_REG_POSITION(viewport, 0x300);
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@ -86,8 +86,6 @@ public:
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}
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private:
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static constexpr u32 InvalidGraphMacroEntry = 0xFFFFFFFF;
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/// Writes a single register in the engine bound to the specified subchannel
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void WriteReg(u32 method, u32 subchannel, u32 value, u32 remaining_params);
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@ -100,11 +98,6 @@ private:
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std::unique_ptr<Engines::Fermi2D> fermi_2d;
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/// Compute engine
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std::unique_ptr<Engines::MaxwellCompute> maxwell_compute;
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/// Entry of the macro that is currently being uploaded
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u32 current_macro_entry = InvalidGraphMacroEntry;
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/// Code being uploaded for the current macro
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std::vector<u32> current_macro_code;
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};
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} // namespace Tegra
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