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shader_decode: implement ATOM operation for S32 and U32

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This commit is contained in:
Nguyen Dac Nam 2020-03-14 01:23:47 +07:00 committed by namkazy
parent 93cac0d294
commit 972485ff18
1 changed files with 39 additions and 6 deletions
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45
src/video_core/shader/decode/memory.cpp
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@ -363,10 +363,13 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
break; break;
} }
case OpCode::Id::ATOM: { case OpCode::Id::ATOM: {
UNIMPLEMENTED_IF_MSG(instr.atom.operation != GlobalAtomicOp::Add, "operation={}", UNIMPLEMENTED_IF_MSG(instr.atom.operation == GlobalAtomicOp::Inc ||
static_cast<int>(instr.atom.operation.Value())); instr.atom.operation == GlobalAtomicOp::Dec ||
UNIMPLEMENTED_IF_MSG(instr.atom.type != GlobalAtomicType::S32, "type={}", instr.atom.operation == GlobalAtomicOp::SafeAdd,
static_cast<int>(instr.atom.type.Value())); "operation={}", static_cast<int>(instr.atom.operation.Value()));
UNIMPLEMENTED_IF_MSG(instr.atom.type == GlobalAtomicType::S64 ||
instr.atom.type == GlobalAtomicType::U64,
"type={}", static_cast<int>(instr.atom.type.Value()));
const auto [real_address, base_address, descriptor] = const auto [real_address, base_address, descriptor] =
TrackGlobalMemory(bb, instr, true, true); TrackGlobalMemory(bb, instr, true, true);
@ -375,9 +378,39 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
break; break;
} }
const bool is_signed =
instr.atoms.type == AtomicType::S32 || instr.atoms.type == AtomicType::S64;
Node gmem = MakeNode<GmemNode>(real_address, base_address, descriptor); Node gmem = MakeNode<GmemNode>(real_address, base_address, descriptor);
Node value = Node data = GetRegister(instr.gpr20);
Operation(OperationCode::AtomicIAdd, std::move(gmem), GetRegister(instr.gpr20));
Node value = [&]() {
switch (instr.atoms.operation) {
case AtomicOp::Add:
return SignedOperation(OperationCode::AtomicIAdd, is_signed, std::move(gmem),
std::move(data));
case AtomicOp::Min:
return SignedOperation(OperationCode::AtomicIMin, is_signed, std::move(gmem),
std::move(data));
case AtomicOp::Max:
return SignedOperation(OperationCode::AtomicIMax, is_signed, std::move(gmem),
std::move(data));
case AtomicOp::And:
return SignedOperation(OperationCode::AtomicIAnd, is_signed, std::move(gmem),
std::move(data));
case AtomicOp::Or:
return SignedOperation(OperationCode::AtomicIOr, is_signed, std::move(gmem),
std::move(data));
case AtomicOp::Xor:
return SignedOperation(OperationCode::AtomicIXor, is_signed, std::move(gmem),
std::move(data));
case AtomicOp::Exch:
return SignedOperation(OperationCode::AtomicIExchange, is_signed, std::move(gmem),
std::move(data));
default:
UNREACHABLE();
return Immediate(0);
}
}();
SetRegister(bb, instr.gpr0, std::move(value)); SetRegister(bb, instr.gpr0, std::move(value));
break; break;
} }