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shader_decode: Implement MUFU
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4ccaa1402d
commit
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@ -93,6 +93,35 @@ u32 ShaderIR::DecodeArithmetic(BasicBlock& bb, u32 pc) {
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SetRegister(bb, instr.gpr0, value);
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SetRegister(bb, instr.gpr0, value);
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break;
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break;
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}
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}
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case OpCode::Id::MUFU: {
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op_a = GetOperandAbsNegFloat(op_a, instr.alu.abs_a, instr.alu.negate_a);
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Node value = [&]() {
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switch (instr.sub_op) {
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case SubOp::Cos:
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return Operation(OperationCode::FCos, PRECISE, op_a);
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case SubOp::Sin:
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return Operation(OperationCode::FSin, PRECISE, op_a);
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case SubOp::Ex2:
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return Operation(OperationCode::FExp2, PRECISE, op_a);
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case SubOp::Lg2:
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return Operation(OperationCode::FLog2, PRECISE, op_a);
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case SubOp::Rcp:
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return Operation(OperationCode::FDiv, PRECISE, Immediate(1.0f), op_a);
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case SubOp::Rsq:
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return Operation(OperationCode::FInverseSqrt, PRECISE, op_a);
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case SubOp::Sqrt:
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return Operation(OperationCode::FSqrt, PRECISE, op_a);
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default:
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UNIMPLEMENTED_MSG("Unhandled MUFU sub op={0:x}",
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static_cast<unsigned>(instr.sub_op.Value()));
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}
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}();
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value = GetSaturatedFloat(value, instr.alu.saturate_d);
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SetRegister(bb, instr.gpr0, value);
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break;
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}
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default:
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default:
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UNIMPLEMENTED_MSG("Unhandled arithmetic instruction: {}", opcode->get().GetName());
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UNIMPLEMENTED_MSG("Unhandled arithmetic instruction: {}", opcode->get().GetName());
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}
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}
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