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Merge pull request #2855 from ReinUsesLisp/shfl
shader_ir/warp: Implement SHFL for Nvidia devices
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commit
88d857499b
@ -566,6 +566,13 @@ enum class ImageAtomicOperation : u64 {
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Exch = 8,
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};
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enum class ShuffleOperation : u64 {
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Idx = 0, // shuffleNV
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Up = 1, // shuffleUpNV
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Down = 2, // shuffleDownNV
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Bfly = 3, // shuffleXorNV
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};
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union Instruction {
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Instruction& operator=(const Instruction& instr) {
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value = instr.value;
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@ -599,6 +606,15 @@ union Instruction {
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BitField<42, 1, u64> negate_value;
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} vote;
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union {
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BitField<30, 2, ShuffleOperation> operation;
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BitField<48, 3, u64> pred48;
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BitField<28, 1, u64> is_index_imm;
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BitField<29, 1, u64> is_mask_imm;
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BitField<20, 5, u64> index_imm;
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BitField<34, 13, u64> mask_imm;
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} shfl;
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union {
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BitField<8, 8, Register> gpr;
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BitField<20, 24, s64> offset;
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@ -1542,6 +1558,7 @@ public:
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BRK,
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DEPBAR,
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VOTE,
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SHFL,
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BFE_C,
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BFE_R,
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BFE_IMM,
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@ -1833,6 +1850,7 @@ private:
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INST("111000110000----", Id::EXIT, Type::Flow, "EXIT"),
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INST("1111000011110---", Id::DEPBAR, Type::Synch, "DEPBAR"),
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INST("0101000011011---", Id::VOTE, Type::Warp, "VOTE"),
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INST("1110111100010---", Id::SHFL, Type::Warp, "SHFL"),
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INST("1110111111011---", Id::LD_A, Type::Memory, "LD_A"),
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INST("1110111101001---", Id::LD_S, Type::Memory, "LD_S"),
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INST("1110111101000---", Id::LD_L, Type::Memory, "LD_L"),
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@ -214,7 +214,8 @@ CachedProgram SpecializeShader(const std::string& code, const GLShader::ShaderEn
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std::string source = "#version 430 core\n"
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"#extension GL_ARB_separate_shader_objects : enable\n"
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"#extension GL_NV_gpu_shader5 : enable\n"
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"#extension GL_NV_shader_thread_group : enable\n";
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"#extension GL_NV_shader_thread_group : enable\n"
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"#extension GL_NV_shader_thread_shuffle : enable\n";
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if (entries.shader_viewport_layer_array) {
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source += "#extension GL_ARB_shader_viewport_layer_array : enable\n";
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}
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@ -1953,8 +1953,7 @@ private:
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Expression BallotThread(Operation operation) {
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const std::string value = VisitOperand(operation, 0).AsBool();
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if (!device.HasWarpIntrinsics()) {
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LOG_ERROR(Render_OpenGL,
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"Nvidia warp intrinsics are not available and its required by a shader");
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LOG_ERROR(Render_OpenGL, "Nvidia vote intrinsics are required by this shader");
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// Stub on non-Nvidia devices by simulating all threads voting the same as the active
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// one.
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return {fmt::format("({} ? 0xFFFFFFFFU : 0U)", value), Type::Uint};
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@ -1965,8 +1964,7 @@ private:
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Expression Vote(Operation operation, const char* func) {
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const std::string value = VisitOperand(operation, 0).AsBool();
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if (!device.HasWarpIntrinsics()) {
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LOG_ERROR(Render_OpenGL,
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"Nvidia vote intrinsics are not available and its required by a shader");
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LOG_ERROR(Render_OpenGL, "Nvidia vote intrinsics are required by this shader");
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// Stub with a warp size of one.
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return {value, Type::Bool};
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}
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@ -1983,15 +1981,54 @@ private:
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Expression VoteEqual(Operation operation) {
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if (!device.HasWarpIntrinsics()) {
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LOG_ERROR(Render_OpenGL,
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"Nvidia vote intrinsics are not available and its required by a shader");
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// We must return true here since a stub for a theoretical warp size of 1 will always
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// return an equal result for all its votes.
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LOG_ERROR(Render_OpenGL, "Nvidia vote intrinsics are required by this shader");
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// We must return true here since a stub for a theoretical warp size of 1.
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// This will always return an equal result across all votes.
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return {"true", Type::Bool};
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}
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return Vote(operation, "allThreadsEqualNV");
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}
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template <const std::string_view& func>
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Expression Shuffle(Operation operation) {
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const std::string value = VisitOperand(operation, 0).AsFloat();
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if (!device.HasWarpIntrinsics()) {
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LOG_ERROR(Render_OpenGL, "Nvidia shuffle intrinsics are required by this shader");
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// On a "single-thread" device we are either on the same thread or out of bounds. Both
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// cases return the passed value.
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return {value, Type::Float};
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}
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const std::string index = VisitOperand(operation, 1).AsUint();
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const std::string width = VisitOperand(operation, 2).AsUint();
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return {fmt::format("{}({}, {}, {})", func, value, index, width), Type::Float};
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}
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template <const std::string_view& func>
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Expression InRangeShuffle(Operation operation) {
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const std::string index = VisitOperand(operation, 0).AsUint();
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const std::string width = VisitOperand(operation, 1).AsUint();
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if (!device.HasWarpIntrinsics()) {
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// On a "single-thread" device we are only in bounds when the requested index is 0.
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return {fmt::format("({} == 0U)", index), Type::Bool};
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}
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const std::string in_range = code.GenerateTemporary();
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code.AddLine("bool {};", in_range);
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code.AddLine("{}(0U, {}, {}, {});", func, index, width, in_range);
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return {in_range, Type::Bool};
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}
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struct Func final {
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Func() = delete;
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~Func() = delete;
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static constexpr std::string_view ShuffleIndexed = "shuffleNV";
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static constexpr std::string_view ShuffleUp = "shuffleUpNV";
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static constexpr std::string_view ShuffleDown = "shuffleDownNV";
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static constexpr std::string_view ShuffleButterfly = "shuffleXorNV";
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};
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static constexpr std::array operation_decompilers = {
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&GLSLDecompiler::Assign,
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@ -2154,6 +2191,16 @@ private:
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&GLSLDecompiler::VoteAll,
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&GLSLDecompiler::VoteAny,
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&GLSLDecompiler::VoteEqual,
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&GLSLDecompiler::Shuffle<Func::ShuffleIndexed>,
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&GLSLDecompiler::Shuffle<Func::ShuffleUp>,
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&GLSLDecompiler::Shuffle<Func::ShuffleDown>,
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&GLSLDecompiler::Shuffle<Func::ShuffleButterfly>,
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&GLSLDecompiler::InRangeShuffle<Func::ShuffleIndexed>,
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&GLSLDecompiler::InRangeShuffle<Func::ShuffleUp>,
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&GLSLDecompiler::InRangeShuffle<Func::ShuffleDown>,
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&GLSLDecompiler::InRangeShuffle<Func::ShuffleButterfly>,
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};
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static_assert(operation_decompilers.size() == static_cast<std::size_t>(OperationCode::Amount));
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@ -1127,6 +1127,46 @@ private:
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return {};
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}
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Id ShuffleIndexed(Operation) {
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UNIMPLEMENTED();
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return {};
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}
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Id ShuffleUp(Operation) {
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UNIMPLEMENTED();
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return {};
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}
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Id ShuffleDown(Operation) {
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UNIMPLEMENTED();
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return {};
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}
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Id ShuffleButterfly(Operation) {
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UNIMPLEMENTED();
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return {};
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}
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Id InRangeShuffleIndexed(Operation) {
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UNIMPLEMENTED();
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return {};
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}
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Id InRangeShuffleUp(Operation) {
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UNIMPLEMENTED();
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return {};
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}
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Id InRangeShuffleDown(Operation) {
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UNIMPLEMENTED();
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return {};
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}
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Id InRangeShuffleButterfly(Operation) {
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UNIMPLEMENTED();
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return {};
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}
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Id DeclareBuiltIn(spv::BuiltIn builtin, spv::StorageClass storage, Id type,
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const std::string& name) {
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const Id id = OpVariable(type, storage);
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@ -1431,6 +1471,16 @@ private:
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&SPIRVDecompiler::VoteAll,
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&SPIRVDecompiler::VoteAny,
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&SPIRVDecompiler::VoteEqual,
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&SPIRVDecompiler::ShuffleIndexed,
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&SPIRVDecompiler::ShuffleUp,
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&SPIRVDecompiler::ShuffleDown,
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&SPIRVDecompiler::ShuffleButterfly,
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&SPIRVDecompiler::InRangeShuffleIndexed,
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&SPIRVDecompiler::InRangeShuffleUp,
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&SPIRVDecompiler::InRangeShuffleDown,
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&SPIRVDecompiler::InRangeShuffleButterfly,
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};
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static_assert(operation_decompilers.size() == static_cast<std::size_t>(OperationCode::Amount));
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@ -13,6 +13,7 @@ namespace VideoCommon::Shader {
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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using Tegra::Shader::Pred;
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using Tegra::Shader::ShuffleOperation;
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using Tegra::Shader::VoteOperation;
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namespace {
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@ -44,6 +45,52 @@ u32 ShaderIR::DecodeWarp(NodeBlock& bb, u32 pc) {
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SetPredicate(bb, instr.vote.dest_pred, vote);
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break;
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}
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case OpCode::Id::SHFL: {
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Node mask = instr.shfl.is_mask_imm ? Immediate(static_cast<u32>(instr.shfl.mask_imm))
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: GetRegister(instr.gpr39);
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Node width = [&] {
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// Convert the obscure SHFL mask back into GL_NV_shader_thread_shuffle's width. This has
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// been done reversing Nvidia's math. It won't work on all cases due to SHFL having
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// different parameters that don't properly map to GLSL's interface, but it should work
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// for cases emitted by Nvidia's compiler.
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if (instr.shfl.operation == ShuffleOperation::Up) {
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return Operation(
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OperationCode::ILogicalShiftRight,
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Operation(OperationCode::IAdd, std::move(mask), Immediate(-0x2000)),
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Immediate(8));
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} else {
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return Operation(OperationCode::ILogicalShiftRight,
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Operation(OperationCode::IAdd, Immediate(0x201F),
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Operation(OperationCode::INegate, std::move(mask))),
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Immediate(8));
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}
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}();
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const auto [operation, in_range] = [instr]() -> std::pair<OperationCode, OperationCode> {
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switch (instr.shfl.operation) {
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case ShuffleOperation::Idx:
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return {OperationCode::ShuffleIndexed, OperationCode::InRangeShuffleIndexed};
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case ShuffleOperation::Up:
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return {OperationCode::ShuffleUp, OperationCode::InRangeShuffleUp};
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case ShuffleOperation::Down:
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return {OperationCode::ShuffleDown, OperationCode::InRangeShuffleDown};
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case ShuffleOperation::Bfly:
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return {OperationCode::ShuffleButterfly, OperationCode::InRangeShuffleButterfly};
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}
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UNREACHABLE_MSG("Invalid SHFL operation: {}",
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static_cast<u64>(instr.shfl.operation.Value()));
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return {};
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}();
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// Setting the predicate before the register is intentional to avoid overwriting.
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Node index = instr.shfl.is_index_imm ? Immediate(static_cast<u32>(instr.shfl.index_imm))
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: GetRegister(instr.gpr20);
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SetPredicate(bb, instr.shfl.pred48, Operation(in_range, index, width));
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SetRegister(
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bb, instr.gpr0,
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Operation(operation, GetRegister(instr.gpr8), std::move(index), std::move(width)));
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break;
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}
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default:
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UNIMPLEMENTED_MSG("Unhandled warp instruction: {}", opcode->get().GetName());
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break;
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@ -181,6 +181,16 @@ enum class OperationCode {
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VoteAny, /// (bool) -> bool
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VoteEqual, /// (bool) -> bool
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ShuffleIndexed, /// (uint value, uint index, uint width) -> uint
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ShuffleUp, /// (uint value, uint index, uint width) -> uint
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ShuffleDown, /// (uint value, uint index, uint width) -> uint
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ShuffleButterfly, /// (uint value, uint index, uint width) -> uint
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InRangeShuffleIndexed, /// (uint index, uint width) -> bool
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InRangeShuffleUp, /// (uint index, uint width) -> bool
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InRangeShuffleDown, /// (uint index, uint width) -> bool
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InRangeShuffleButterfly, /// (uint index, uint width) -> bool
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Amount,
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};
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