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Merge pull request #1299 from FernandoS27/texture-sanatize
shader_decompiler: Asserts for Texture Instructions
This commit is contained in:
commit
6415f81bb8
@ -271,6 +271,15 @@ enum class TextureProcessMode : u64 {
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LLA = 7 // Load LOD. The A is unknown, does not appear to differ with LL
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LLA = 7 // Load LOD. The A is unknown, does not appear to differ with LL
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};
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};
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enum class TextureMiscMode : u64 {
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DC,
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AOFFI, // Uses Offset
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NDV,
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NODEP,
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MZ,
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PTP,
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};
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enum class IpaInterpMode : u64 { Linear = 0, Perspective = 1, Flat = 2, Sc = 3 };
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enum class IpaInterpMode : u64 { Linear = 0, Perspective = 1, Flat = 2, Sc = 3 };
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enum class IpaSampleMode : u64 { Default = 0, Centroid = 1, Offset = 2 };
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enum class IpaSampleMode : u64 { Default = 0, Centroid = 1, Offset = 2 };
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@ -590,42 +599,127 @@ union Instruction {
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BitField<28, 1, u64> array;
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BitField<28, 1, u64> array;
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BitField<29, 2, TextureType> texture_type;
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BitField<29, 2, TextureType> texture_type;
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BitField<31, 4, u64> component_mask;
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BitField<31, 4, u64> component_mask;
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BitField<49, 1, u64> nodep_flag;
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BitField<50, 1, u64> dc_flag;
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BitField<54, 1, u64> aoffi_flag;
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BitField<55, 3, TextureProcessMode> process_mode;
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BitField<55, 3, TextureProcessMode> process_mode;
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bool IsComponentEnabled(std::size_t component) const {
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bool IsComponentEnabled(std::size_t component) const {
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return ((1ull << component) & component_mask) != 0;
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return ((1ull << component) & component_mask) != 0;
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}
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}
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TextureProcessMode GetTextureProcessMode() const {
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return process_mode;
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}
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bool UsesMiscMode(TextureMiscMode mode) const {
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switch (mode) {
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case TextureMiscMode::DC:
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return dc_flag != 0;
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case TextureMiscMode::NODEP:
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return nodep_flag != 0;
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case TextureMiscMode::AOFFI:
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return aoffi_flag != 0;
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default:
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break;
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}
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return false;
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}
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} tex;
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} tex;
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union {
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union {
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BitField<22, 6, TextureQueryType> query_type;
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BitField<22, 6, TextureQueryType> query_type;
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BitField<31, 4, u64> component_mask;
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BitField<31, 4, u64> component_mask;
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BitField<49, 1, u64> nodep_flag;
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bool UsesMiscMode(TextureMiscMode mode) const {
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switch (mode) {
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case TextureMiscMode::NODEP:
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return nodep_flag != 0;
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default:
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break;
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}
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return false;
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}
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} txq;
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} txq;
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union {
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union {
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BitField<28, 1, u64> array;
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BitField<28, 1, u64> array;
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BitField<29, 2, TextureType> texture_type;
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BitField<29, 2, TextureType> texture_type;
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BitField<31, 4, u64> component_mask;
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BitField<31, 4, u64> component_mask;
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BitField<35, 1, u64> ndv_flag;
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BitField<49, 1, u64> nodep_flag;
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bool IsComponentEnabled(std::size_t component) const {
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bool IsComponentEnabled(std::size_t component) const {
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return ((1ull << component) & component_mask) != 0;
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return ((1ull << component) & component_mask) != 0;
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}
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}
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bool UsesMiscMode(TextureMiscMode mode) const {
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switch (mode) {
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case TextureMiscMode::NDV:
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return (ndv_flag != 0);
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case TextureMiscMode::NODEP:
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return (nodep_flag != 0);
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default:
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break;
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}
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return false;
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}
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} tmml;
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} tmml;
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union {
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union {
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BitField<28, 1, u64> array;
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BitField<28, 1, u64> array;
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BitField<29, 2, TextureType> texture_type;
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BitField<29, 2, TextureType> texture_type;
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BitField<35, 1, u64> ndv_flag;
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BitField<49, 1, u64> nodep_flag;
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BitField<50, 1, u64> dc_flag;
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BitField<54, 2, u64> info;
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BitField<56, 2, u64> component;
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BitField<56, 2, u64> component;
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bool UsesMiscMode(TextureMiscMode mode) const {
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switch (mode) {
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case TextureMiscMode::NDV:
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return ndv_flag != 0;
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case TextureMiscMode::NODEP:
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return nodep_flag != 0;
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case TextureMiscMode::DC:
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return dc_flag != 0;
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case TextureMiscMode::AOFFI:
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return info == 1;
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case TextureMiscMode::PTP:
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return info == 2;
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default:
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break;
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}
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return false;
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}
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} tld4;
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} tld4;
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union {
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union {
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BitField<49, 1, u64> nodep_flag;
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BitField<50, 1, u64> dc_flag;
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BitField<51, 1, u64> aoffi_flag;
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BitField<52, 2, u64> component;
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BitField<52, 2, u64> component;
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bool UsesMiscMode(TextureMiscMode mode) const {
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switch (mode) {
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case TextureMiscMode::DC:
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return dc_flag != 0;
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case TextureMiscMode::NODEP:
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return nodep_flag != 0;
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case TextureMiscMode::AOFFI:
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return aoffi_flag != 0;
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default:
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break;
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}
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return false;
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}
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} tld4s;
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} tld4s;
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union {
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union {
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BitField<0, 8, Register> gpr0;
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BitField<0, 8, Register> gpr0;
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BitField<28, 8, Register> gpr28;
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BitField<28, 8, Register> gpr28;
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BitField<49, 1, u64> nodep;
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BitField<49, 1, u64> nodep_flag;
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BitField<50, 3, u64> component_mask_selector;
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BitField<50, 3, u64> component_mask_selector;
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BitField<53, 4, u64> texture_info;
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BitField<53, 4, u64> texture_info;
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@ -645,6 +739,37 @@ union Instruction {
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UNREACHABLE();
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UNREACHABLE();
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}
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}
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TextureProcessMode GetTextureProcessMode() const {
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switch (texture_info) {
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case 0:
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case 2:
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case 6:
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case 8:
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case 9:
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case 11:
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return TextureProcessMode::LZ;
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case 3:
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case 5:
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case 13:
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return TextureProcessMode::LL;
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default:
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break;
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}
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return TextureProcessMode::None;
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}
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bool UsesMiscMode(TextureMiscMode mode) const {
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switch (mode) {
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case TextureMiscMode::DC:
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return (texture_info >= 4 && texture_info <= 6) || texture_info == 9;
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case TextureMiscMode::NODEP:
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return nodep_flag != 0;
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default:
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break;
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}
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return false;
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}
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bool IsArrayTexture() const {
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bool IsArrayTexture() const {
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// TEXS only supports Texture2D arrays.
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// TEXS only supports Texture2D arrays.
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return texture_info >= 7 && texture_info <= 9;
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return texture_info >= 7 && texture_info <= 9;
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@ -673,6 +798,7 @@ union Instruction {
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} texs;
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} texs;
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union {
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union {
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BitField<49, 1, u64> nodep_flag;
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BitField<53, 4, u64> texture_info;
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BitField<53, 4, u64> texture_info;
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TextureType GetTextureType() const {
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TextureType GetTextureType() const {
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@ -693,6 +819,26 @@ union Instruction {
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UNREACHABLE();
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UNREACHABLE();
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}
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}
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TextureProcessMode GetTextureProcessMode() const {
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if (texture_info == 1 || texture_info == 5 || texture_info == 12)
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return TextureProcessMode::LL;
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return TextureProcessMode::LZ;
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}
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bool UsesMiscMode(TextureMiscMode mode) const {
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switch (mode) {
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case TextureMiscMode::AOFFI:
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return texture_info == 12 || texture_info == 4;
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case TextureMiscMode::MZ:
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return texture_info == 5;
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case TextureMiscMode::NODEP:
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return nodep_flag != 0;
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default:
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break;
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}
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return false;
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}
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bool IsArrayTexture() const {
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bool IsArrayTexture() const {
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// TEXS only supports Texture2D arrays.
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// TEXS only supports Texture2D arrays.
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return texture_info == 8;
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return texture_info == 8;
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@ -938,8 +938,6 @@ private:
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// TEXS has two destination registers and a swizzle. The first two elements in the swizzle
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// TEXS has two destination registers and a swizzle. The first two elements in the swizzle
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// go into gpr0+0 and gpr0+1, and the rest goes into gpr28+0 and gpr28+1
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// go into gpr0+0 and gpr0+1, and the rest goes into gpr28+0 and gpr28+1
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ASSERT_MSG(instr.texs.nodep == 0, "TEXS nodep not implemented");
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std::size_t written_components = 0;
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std::size_t written_components = 0;
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for (u32 component = 0; component < 4; ++component) {
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for (u32 component = 0; component < 4; ++component) {
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if (!instr.texs.IsComponentEnabled(component)) {
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if (!instr.texs.IsComponentEnabled(component)) {
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@ -1853,6 +1851,13 @@ private:
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Tegra::Shader::TextureType texture_type{instr.tex.texture_type};
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Tegra::Shader::TextureType texture_type{instr.tex.texture_type};
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std::string coord;
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std::string coord;
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ASSERT_MSG(!instr.tex.UsesMiscMode(Tegra::Shader::TextureMiscMode::NODEP),
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"NODEP is not implemented");
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ASSERT_MSG(!instr.tex.UsesMiscMode(Tegra::Shader::TextureMiscMode::AOFFI),
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"AOFFI is not implemented");
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ASSERT_MSG(!instr.tex.UsesMiscMode(Tegra::Shader::TextureMiscMode::DC),
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"DC is not implemented");
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switch (texture_type) {
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switch (texture_type) {
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case Tegra::Shader::TextureType::Texture1D: {
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case Tegra::Shader::TextureType::Texture1D: {
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const std::string x = regs.GetRegisterAsFloat(instr.gpr8);
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const std::string x = regs.GetRegisterAsFloat(instr.gpr8);
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@ -1935,6 +1940,11 @@ private:
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Tegra::Shader::TextureType texture_type{instr.texs.GetTextureType()};
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Tegra::Shader::TextureType texture_type{instr.texs.GetTextureType()};
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bool is_array{instr.texs.IsArrayTexture()};
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bool is_array{instr.texs.IsArrayTexture()};
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ASSERT_MSG(!instr.texs.UsesMiscMode(Tegra::Shader::TextureMiscMode::NODEP),
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"NODEP is not implemented");
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ASSERT_MSG(!instr.texs.UsesMiscMode(Tegra::Shader::TextureMiscMode::DC),
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"DC is not implemented");
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switch (texture_type) {
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switch (texture_type) {
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case Tegra::Shader::TextureType::Texture2D: {
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case Tegra::Shader::TextureType::Texture2D: {
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if (is_array) {
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if (is_array) {
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@ -1971,6 +1981,13 @@ private:
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ASSERT(instr.tlds.IsArrayTexture() == false);
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ASSERT(instr.tlds.IsArrayTexture() == false);
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std::string coord;
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std::string coord;
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ASSERT_MSG(!instr.tlds.UsesMiscMode(Tegra::Shader::TextureMiscMode::NODEP),
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"NODEP is not implemented");
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ASSERT_MSG(!instr.tlds.UsesMiscMode(Tegra::Shader::TextureMiscMode::AOFFI),
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"AOFFI is not implemented");
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ASSERT_MSG(!instr.tlds.UsesMiscMode(Tegra::Shader::TextureMiscMode::MZ),
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"MZ is not implemented");
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switch (instr.tlds.GetTextureType()) {
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switch (instr.tlds.GetTextureType()) {
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case Tegra::Shader::TextureType::Texture2D: {
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case Tegra::Shader::TextureType::Texture2D: {
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if (instr.tlds.IsArrayTexture()) {
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if (instr.tlds.IsArrayTexture()) {
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@ -1999,6 +2016,17 @@ private:
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ASSERT(instr.tld4.array == 0);
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ASSERT(instr.tld4.array == 0);
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std::string coord;
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std::string coord;
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ASSERT_MSG(!instr.tld4.UsesMiscMode(Tegra::Shader::TextureMiscMode::NODEP),
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"NODEP is not implemented");
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ASSERT_MSG(!instr.tld4.UsesMiscMode(Tegra::Shader::TextureMiscMode::AOFFI),
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"AOFFI is not implemented");
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ASSERT_MSG(!instr.tld4.UsesMiscMode(Tegra::Shader::TextureMiscMode::DC),
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"DC is not implemented");
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ASSERT_MSG(!instr.tld4.UsesMiscMode(Tegra::Shader::TextureMiscMode::NDV),
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"NDV is not implemented");
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ASSERT_MSG(!instr.tld4.UsesMiscMode(Tegra::Shader::TextureMiscMode::PTP),
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"PTP is not implemented");
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switch (instr.tld4.texture_type) {
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switch (instr.tld4.texture_type) {
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case Tegra::Shader::TextureType::Texture2D: {
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case Tegra::Shader::TextureType::Texture2D: {
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const std::string x = regs.GetRegisterAsFloat(instr.gpr8);
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const std::string x = regs.GetRegisterAsFloat(instr.gpr8);
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@ -2036,6 +2064,13 @@ private:
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break;
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break;
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}
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}
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case OpCode::Id::TLD4S: {
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case OpCode::Id::TLD4S: {
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ASSERT_MSG(!instr.tld4s.UsesMiscMode(Tegra::Shader::TextureMiscMode::NODEP),
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"NODEP is not implemented");
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ASSERT_MSG(!instr.tld4s.UsesMiscMode(Tegra::Shader::TextureMiscMode::AOFFI),
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"AOFFI is not implemented");
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ASSERT_MSG(!instr.tld4s.UsesMiscMode(Tegra::Shader::TextureMiscMode::DC),
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"DC is not implemented");
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const std::string op_a = regs.GetRegisterAsFloat(instr.gpr8);
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const std::string op_a = regs.GetRegisterAsFloat(instr.gpr8);
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const std::string op_b = regs.GetRegisterAsFloat(instr.gpr20);
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const std::string op_b = regs.GetRegisterAsFloat(instr.gpr20);
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// TODO(Subv): Figure out how the sampler type is encoded in the TLD4S instruction.
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// TODO(Subv): Figure out how the sampler type is encoded in the TLD4S instruction.
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@ -2048,6 +2083,9 @@ private:
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break;
|
break;
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}
|
}
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case OpCode::Id::TXQ: {
|
case OpCode::Id::TXQ: {
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ASSERT_MSG(!instr.txq.UsesMiscMode(Tegra::Shader::TextureMiscMode::NODEP),
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"NODEP is not implemented");
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|
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// TODO: the new commits on the texture refactor, change the way samplers work.
|
// TODO: the new commits on the texture refactor, change the way samplers work.
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// Sadly, not all texture instructions specify the type of texture their sampler
|
// Sadly, not all texture instructions specify the type of texture their sampler
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// uses. This must be fixed at a later instance.
|
// uses. This must be fixed at a later instance.
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@ -2068,6 +2106,11 @@ private:
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break;
|
break;
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}
|
}
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case OpCode::Id::TMML: {
|
case OpCode::Id::TMML: {
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|
ASSERT_MSG(!instr.tmml.UsesMiscMode(Tegra::Shader::TextureMiscMode::NODEP),
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"NODEP is not implemented");
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ASSERT_MSG(!instr.tmml.UsesMiscMode(Tegra::Shader::TextureMiscMode::NDV),
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"NDV is not implemented");
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|
||||||
const std::string op_a = regs.GetRegisterAsFloat(instr.gpr8);
|
const std::string op_a = regs.GetRegisterAsFloat(instr.gpr8);
|
||||||
const std::string op_b = regs.GetRegisterAsFloat(instr.gpr8.Value() + 1);
|
const std::string op_b = regs.GetRegisterAsFloat(instr.gpr8.Value() + 1);
|
||||||
const bool is_array = instr.tmml.array != 0;
|
const bool is_array = instr.tmml.array != 0;
|
||||||
|
Loading…
Reference in New Issue
Block a user