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OpenGL: Pass Pica regs via parameter
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a6fd4533f6
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@ -1004,7 +1004,7 @@ void RasterizerOpenGL::SamplerInfo::SyncWithConfig(
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}
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void RasterizerOpenGL::SetShader() {
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GLShader::PicaShaderConfig config = GLShader::PicaShaderConfig::CurrentConfig();
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auto config = GLShader::PicaShaderConfig::BuildFromRegs(Pica::g_state.regs);
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std::unique_ptr<PicaShader> shader = std::make_unique<PicaShader>();
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// Find (or generate) the GLSL shader for the current TEV state
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@ -24,14 +24,12 @@ using TevStageConfig = TexturingRegs::TevStageConfig;
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namespace GLShader {
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PicaShaderConfig PicaShaderConfig::CurrentConfig() {
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PicaShaderConfig PicaShaderConfig::BuildFromRegs(const Pica::Regs& regs) {
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PicaShaderConfig res;
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auto& state = res.state;
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std::memset(&state, 0, sizeof(PicaShaderConfig::State));
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const auto& regs = Pica::g_state.regs;
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state.scissor_test_mode = regs.rasterizer.scissor_test.mode;
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state.depthmap_enable = regs.rasterizer.depthmap_enable;
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@ -39,8 +39,8 @@ enum Attributes {
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*/
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union PicaShaderConfig {
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/// Construct a PicaShaderConfig with the current Pica register configuration.
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static PicaShaderConfig CurrentConfig();
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/// Construct a PicaShaderConfig with the given Pica register configuration.
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static PicaShaderConfig BuildFromRegs(const Pica::Regs& regs);
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bool TevStageUpdatesCombinerBufferColor(unsigned stage_index) const {
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return (stage_index < 4) && (state.combiner_buffer_input & (1 << stage_index));
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@ -58,7 +58,7 @@ union PicaShaderConfig {
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// This makes BitField not TC when used in a union or struct so we have to resort
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// to this ugly hack.
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// Once that bug is fixed we can use Pica::Regs::TevStageConfig here.
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// Doesn't include const_color because we don't sync it, see comment in CurrentConfig()
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// Doesn't include const_color because we don't sync it, see comment in BuildFromRegs()
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struct TevStageConfigRaw {
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u32 sources_raw;
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u32 modifiers_raw;
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