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shader_decode: implement ATOMS instr partial.
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parent
a2cc80b605
commit
3dc09a6250
@ -376,16 +376,20 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
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}
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Node gmem = MakeNode<GmemNode>(real_address, base_address, descriptor);
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Node value = Operation(OperationCode::AtomicAdd, std::move(gmem), GetRegister(instr.gpr20));
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Node value =
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Operation(OperationCode::AtomicIAdd, std::move(gmem), GetRegister(instr.gpr20));
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SetRegister(bb, instr.gpr0, std::move(value));
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break;
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}
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case OpCode::Id::ATOMS: {
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UNIMPLEMENTED_IF_MSG(instr.atoms.operation != AtomicOp::Add, "operation={}",
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static_cast<int>(instr.atoms.operation.Value()));
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UNIMPLEMENTED_IF_MSG(instr.atoms.type != AtomicType::U32, "type={}",
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static_cast<int>(instr.atoms.type.Value()));
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UNIMPLEMENTED_IF_MSG(instr.atoms.operation == AtomicOp::Inc ||
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instr.atoms.operation == AtomicOp::Dec,
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"operation={}", static_cast<int>(instr.atoms.operation.Value()));
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UNIMPLEMENTED_IF_MSG(instr.atoms.type == AtomicType::S64 ||
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instr.atoms.type == AtomicType::U64,
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"type={}", static_cast<int>(instr.atoms.type.Value()));
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const bool is_signed =
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instr.atoms.type == AtomicType::S32 || instr.atoms.type == AtomicType::S64;
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const s32 offset = instr.atoms.GetImmediateOffset();
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Node address = GetRegister(instr.gpr8);
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address = Operation(OperationCode::IAdd, std::move(address), Immediate(offset));
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@ -393,7 +397,35 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
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Node memory = GetSharedMemory(std::move(address));
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Node data = GetRegister(instr.gpr20);
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Node value = Operation(OperationCode::AtomicAdd, std::move(memory), std::move(data));
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Node value = [&]() {
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switch (instr.atoms.operation) {
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case AtomicOp::Add:
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return SignedOperation(OperationCode::AtomicIAdd, is_signed, std::move(memory),
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std::move(data));
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case AtomicOp::Min:
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return SignedOperation(OperationCode::AtomicIMin, is_signed, std::move(memory),
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std::move(data));
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case AtomicOp::Max:
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return SignedOperation(OperationCode::AtomicIMax, is_signed, std::move(memory),
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std::move(data));
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case AtomicOp::And:
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return SignedOperation(OperationCode::AtomicIAnd, is_signed, std::move(memory),
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std::move(data));
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case AtomicOp::Or:
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return SignedOperation(OperationCode::AtomicIOr, is_signed, std::move(memory),
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std::move(data));
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case AtomicOp::Xor:
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return SignedOperation(OperationCode::AtomicIXor, is_signed, std::move(memory),
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std::move(data));
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case AtomicOp::Exch:
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return SignedOperation(OperationCode::AtomicIExchange, is_signed, std::move(memory),
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std::move(data));
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default:
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UNREACHABLE();
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return Immediate(0);
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}
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}();
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SetRegister(bb, instr.gpr0, std::move(value));
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break;
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}
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@ -427,8 +459,8 @@ std::tuple<Node, Node, GlobalMemoryBase> ShaderIR::TrackGlobalMemory(NodeBlock&
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const auto [base_address, index, offset] =
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TrackCbuf(addr_register, global_code, static_cast<s64>(global_code.size()));
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ASSERT_OR_EXECUTE_MSG(base_address != nullptr,
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{ return std::make_tuple(nullptr, nullptr, GlobalMemoryBase{}); },
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ASSERT_OR_EXECUTE_MSG(
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base_address != nullptr, { return std::make_tuple(nullptr, nullptr, GlobalMemoryBase{}); },
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"Global memory tracking failed");
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bb.push_back(Comment(fmt::format("Base address is c[0x{:x}][0x{:x}]", index, offset)));
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