citra/src/core/arm/dyncom
Lioncash 3eccc66abf dyncom: Add more regs to MCR/MRC
Adds the registers that were left out of some coprocessor ranges.
2015-02-10 09:34:42 -05:00
..
arm_dyncom_dec.cpp dyncom: Implemented LDREXD/STREXD/LDREXH/STREXH 2015-01-02 20:51:54 -05:00
arm_dyncom_dec.h dyncom: clean up arm_dyncom_dec.h 2015-01-30 16:28:52 -05:00
arm_dyncom_interpreter.cpp dyncom: Add more regs to MCR/MRC 2015-02-10 09:34:42 -05:00
arm_dyncom_interpreter.h License change 2014-12-20 21:20:24 -08:00
arm_dyncom_run.cpp dyncom: Various cleanups to match coding style, no functional changes. 2014-12-29 21:50:47 -05:00
arm_dyncom_run.h arm: Move headers over to pragma once 2015-01-30 16:17:02 -05:00
arm_dyncom_thumb.cpp dyncom: Various cleanups to match coding style, no functional changes. 2014-12-29 21:50:47 -05:00
arm_dyncom_thumb.h arm: Move headers over to pragma once 2015-01-30 16:17:02 -05:00
arm_dyncom.cpp Scheduler refactor Pt. 1 2015-02-09 21:47:12 -08:00
arm_dyncom.h Scheduler refactor Pt. 1 2015-02-09 21:47:12 -08:00