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590 Commits

Author SHA1 Message Date
BreadFish64
74cd98ecad core: clean up warnings 2018-08-01 14:10:23 -05:00
wwylele
0eab948728 reformat all files with clang-format 2018-06-29 16:56:12 +03:00
wwylele
7c5a76e58b log: replace all NGLOG with LOG 2018-06-29 14:18:07 +03:00
MerryMage
b8c5007153 arm_dyncom_interpreter: Clear exclusive memory state after SVC call 2018-06-03 21:06:57 +01:00
Daniel Lim Wee Soong
7861be67bb core/arm/skyeye_common: Migrate logging macros (#3684) 
* core/arm/skyeye_common: Migrate logging macros

Use the new logging macros NGLOG

* Replace specifiers that were missed out

* Replace printf with NGLOG

* skyeye_common: fix NGLOG without log class
 2018-05-14 11:22:32 +03:00
Daniel Lim Wee Soong
1e4eb7def8 arm/dyncom: Migrate logging macros 2018-04-02 16:01:19 +08:00
James Rowe
f61141e86a Update the entire application to use the new clang format style 2018-03-09 10:54:43 -07:00
MerryMage
fb2d34997e core/arm: Backend-specific context implementations 2017-12-12 19:12:03 +00:00
MerryMage
7d5c3b00a8 dynarmic: Update to d1d4705 2017-12-12 19:08:53 +00:00
Yuri Kunde Schlesner
21188f5683 HLE: Move SVC handlers to the Kernel namespace 2017-12-09 20:32:58 -08:00
Yuri Kunde Schlesner
ad71e23f23 HLE: Move svc.{cpp,h} to kernel/ 2017-12-09 18:10:47 -08:00
Lioncash
088c8521bf dyncom: Remove unnecessary includes 2017-12-07 00:02:55 -05:00
bunnei
1f36472fff
Merge pull request #3229 from lioncash/decode 
arm_dyncom_dec: Hide the decoding table from external view
 2017-12-06 22:46:01 -05:00
bunnei
77493860ca
Merge pull request #3228 from lioncash/explicit 
arm: Make CPU backend constructors explicit
 2017-12-06 22:44:39 -05:00
bunnei
d8ba07a430
Merge pull request #3227 from MerryMage/cro 
Allow for partial invalidation of instruction cache
 2017-12-06 22:43:58 -05:00
Lioncash
ab857f5e45 arm_dyncom_dec: Hide the decoding table from external view 
This isn't used externally anywhere (and really shouldn't be).
 2017-12-06 20:55:52 -05:00
Lioncash
982039be95 arm_dynarmic_cp15: Add missing header guard 2017-12-06 19:51:46 -05:00
Lioncash
e960628a14 arm: Make CPU backend constructors explicit 
Avoids implicit conversions
 2017-12-06 19:37:56 -05:00
MerryMage
647e553f64 ARM_Interface: Allow for partial invalidation of instruction cache 2017-12-06 20:57:55 +00:00
bunnei
e165b5bb94
Merge pull request #3184 from MerryMage/timing 
core/arm: Improve timing accuracy before service calls in JIT
 2017-12-05 23:12:24 -05:00
Lioncash
8599b1e7cc dyncom: Convert the SPSR checking define to a function 
Same thing, with less indirection hiding
 2017-12-05 20:07:45 -05:00
MerryMage
f6dfdc3588 core/arm: Improve timing accuracy before service calls in CPU interpreter 2017-12-03 16:40:21 +00:00
MerryMage
7cd8b437aa core/arm: Improve timing accuracy before service calls in JIT 
We also correct the CPU JIT's implementation of Step.
 2017-12-03 16:06:46 +00:00
MerryMage
b37a850654 dyncom: Remove VFP_REG_ZERO 
Fixes two issues that will never happen:

1. There are cases when VFP_REG_ZERO will be non-zero, but these will
   never be encoutered in well behaved guest code (i.e. writing to D16).

2. If CONFIG_VFPv3 is defined, accessing VFP_REG_ZERO would be out of
   bounds.
 2017-12-02 12:06:51 +00:00
MerryMage
2d917f8ca0 arm_dynarmic: ClearInstructionCache should clear all instruction caches 
Bugfix of 67a70bd.
 2017-11-19 14:47:14 +00:00
Huw Pascoe
529f4a0131 Moved down_count to CoreTiming 2017-09-30 17:38:14 +01:00
MerryMage
67a70bd9e1 ARM_Interface: Implement PageTableChanged 2017-09-24 23:08:25 +01:00
B3n30
813837c5cf Merge pull request #2842 from Subv/switchable_page_table 
Kernel/Memory: Give each process its own page table and allow switching the current page table upon reschedule
 2017-09-15 22:41:45 +02:00
Subv
7a3ab7c63d CPU/Dynarmic: Disable the fast page-table access in dynarmic until it supports switching page tables at runtime. 2017-09-15 14:26:22 -05:00
Subv
d237a89048 CPU/Dynarmic: Fixed a warning when incrementing the number of ticks in ExecuteInstructions. 2017-08-21 08:34:25 -05:00
Subv
9d0841b48b Dyncom: Use size_t instead of int to store the instruction offsets in the instruction cache. 
Fixes a few warnings.
 2017-08-21 08:34:23 -05:00
Subv
d3fb1d6c38 Dyncom: Fixed a conversion warning when decoding thumb instructions. 2017-08-21 08:20:36 -05:00
Sebastian Valle
c291db72e7 Merge pull request #2692 from Subv/vfp_ftz 
Dyncom/VFP: Convert denormal outputs into 0 when the FTZ flag is enabled.
 2017-05-22 12:16:53 -05:00
Subv
5b46a89230 fixup! Dyncom/VFP: Convert denormal outputs into 0 when the FTZ flag is enabled. 2017-05-21 18:56:09 -05:00
Merry
188d63fdb6 Merge pull request #2694 from Subv/vfp_vsub_ftz 
Dyncom/VFP: Perform flush-to-zero on the second operand of vsub before sending it to vadd.
 2017-05-22 00:50:52 +01:00
Subv
a0874a7a68 Dyncom/VFP: Perform flush-to-zero on the second operand of vsub before sending it to vadd. 
Previously we were letting vadd flush the value to positive 0, but there are cases where this behavior is wrong, for example,

vsub: -0 - +0 = -0
vadd: -0 + +0 = +0

Now we'll flush the value to +0 inside vsub, and then negate it.
 2017-05-13 18:03:41 -05:00
Yuri Kunde Schlesner
13dd0b88de Merge pull request #2696 from Subv/vfp_revert 
Dyncom/VFP: Revert edf30d8 and fix the FPSCR getting invalid values.
 2017-05-08 21:38:45 -07:00
Subv
11fe85f129 Dyncom/VFP: Strip the VFP_NAN_FLAG sentinel value when setting vfp exceptions. 2017-05-09 00:36:23 -05:00
Subv
bf45ccfb40 Revert "Remove exceptions parameter from normaliseround VFP functions" 
This reverts commit edf30d84cc.

Conflicts:
	src/core/arm/skyeye_common/vfp/vfp_helper.h
	src/core/arm/skyeye_common/vfp/vfpdouble.cpp
	src/core/arm/skyeye_common/vfp/vfpsingle.cpp
 2017-05-09 00:36:22 -05:00
Subv
b1a29371c9 Dyncom/VFP: Convert denormal outputs into 0 when the FTZ flag is enabled. 
Inputs are still not flushed to 0 if they are denormals.
 2017-05-08 14:34:16 -05:00
Yuri Kunde Schlesner
d97b977540 Dyncom: Remove disassembler code 
Had licensing issue around it, in addition to several bugs.

Closes #1632, #1280
 2017-05-07 15:33:46 -07:00
Yuri Kunde Schlesner
f0a582b218 Dyncom: Tweak types and log formatting 2017-05-07 15:33:42 -07:00
Yuri Kunde Schlesner
cb4da3975e Remove unused symbols code 2017-05-07 15:33:39 -07:00
MerryMage
b125388152 dyncom: Correct SXTAB16 and SXTB16 2017-02-18 20:04:54 +00:00
MerryMage
e2815408fd arm_dynarmic: Update memory interface 2017-02-03 17:32:51 +00:00
MerryMage
2b36d4c9d7 arm_dynarmic: CP15 support 2017-02-03 17:32:47 +00:00
bunnei
76890672a0 Merge pull request #2366 from MerryMage/MemoryReadCode 
arm_dynarmic: Provide MemoryReadCode callback
 2016-12-22 14:25:15 -05:00
MerryMage
f8cf87ce34 arm_dynarmic: Provide MemoryReadCode callback 
Change of interface in dynarmic 36082087ded632079b16d24137fdd0c450ce82ea
 2016-12-22 16:07:14 +00:00
bunnei
8b1e269e58 ThreadContext: Move from "core" to "arm_interface". 2016-12-22 00:27:49 -05:00
Lioncash
ba20dd9b61 gdbstub: Remove global variable from public interface 
Currently, this is only ever queried, so adding a function to check if the
server is enabled is more sensible.

If directly modifying this externally is ever desirable, it should be done
by adding a function to the interface, rather than exposing implementation
details directly.
 2016-12-15 16:37:22 -05:00
Lioncash
2f3c1bdfb4 core: Add missing #pragma once directives where applicable 2016-12-15 15:40:51 -05:00
Emmanuel Gil Peyrot
643e590b5c Core: Add a forgotten #include <cstring> for memcpy. 2016-12-11 01:20:45 +00:00
MerryMage
27be446049 dynarmic: Add ticks based on ticks executed, not ticks requested 2016-11-26 20:32:33 +00:00
James Rowe
bbe57a66ca Expose page table to dynarmic for optimized reads and writes to the JIT 2016-11-24 20:41:18 -07:00
Yuri Kunde Schlesner
84fbbe2629 Use negative priorities to avoid special-casing the self-include 2016-09-21 00:15:56 -07:00
Emmanuel Gil Peyrot
ebdae19fd2 Remove empty newlines in #include blocks. 
This makes clang-format useful on those.

Also add a bunch of forgotten transitive includes, which otherwise
prevented compilation.
 2016-09-21 11:15:47 +09:00
Yuri Kunde Schlesner
396a8d91a4 Manually tweak source formatting and then re-run clang-format 2016-09-18 21:14:25 -07:00
Emmanuel Gil Peyrot
dc8479928c Sources: Run clang-format on everything. 2016-09-18 09:38:01 +09:00
Emmanuel Gil Peyrot
bfc454e951 Dyncom: Disable clang-format on the decoding table. 2016-09-18 09:36:57 +09:00
bunnei
1b95f61d82 arm_dynarmic: Implement GetVFPSystemReg/SetVFPSystemReg. 2016-09-15 17:58:06 -04:00
bunnei
05e120a4cc arm: ResetContext shouldn't be part of ARM_Interface. 2016-09-15 17:49:30 -04:00
bunnei
85861d44b7 arm_dynarmic/arm_dyncom: Remove unnecessary "virtual" keyword. 2016-09-15 17:49:30 -04:00
bunnei
b7aef81cb4 dyncom: Use VFP_FPSCR/VFP_FPEXC. 2016-09-15 17:49:29 -04:00
bunnei
1976a2d773 dynarmic: Implement ARM CPU interface. 2016-09-15 17:49:26 -04:00
wwylele
2161f52661 ARM: add ClearInstructionCache function 2016-08-27 21:38:06 +08:00
MerryMage
15b2eec4bd dyncom: Read-after-write in SMLA 
In the case when RD === RN, RD was updated before AddOverflow was called
to check for an overflow, resulting in an incorrect state of the Q flag.
 2016-08-22 15:13:33 +01:00
MerryMage
50407a8dc8 Dyncom: Correct implementation of STM for R15 2016-08-14 00:49:34 +01:00
MerryMage
60c93ca3b5 dyncom: Fix translation of thumb REVSH 2016-07-28 11:51:29 +01:00
archshift
ca20b1f87d Make arm_dyncom_trans* into a fully fledged compilation unit 2016-06-12 01:54:45 -07:00
archshift
54b5178f6c arm_dyncom_interpreter: slightly change AllocBuffer to be intuitive 2016-06-12 00:31:52 -07:00
archshift
765eef3319 arm_dyncom_interpreter: Add specialized GetAddressingOpLoadStoreT func 
This allows us to get the addressing operation for STRT, LDRT, STRBT,
and LDRBT. We do this so that translation functions don't need to
see the addressing ops directly.
 2016-06-10 18:45:48 -07:00
archshift
eac4c016cb arm_dyncom_interpreter: rename operation functions to fit style guide 2016-06-10 18:42:08 -07:00
archshift
5297f5dfc9 arm_dyncom_interpreter: Rename anonymous enum to TransExtData 2016-06-10 18:35:57 -07:00
archshift
2c482722e7 arm_dyncom_interpreter.cpp: #include translation info from inc files 2016-06-10 18:25:30 -07:00
Mat M
031a9c57bb Merge pull request #1568 from JayFoxRox/fix-printf 
Fix ftoi and disable VFPv3
 2016-05-26 19:03:00 -04:00
Jannik Vogel
edf30d84cc Remove exceptions parameter from normaliseround VFP functions 2016-05-18 16:28:13 +02:00
Jannik Vogel
693cca8f1f Fix exception propagation for VFP single precision 2016-05-18 15:24:42 +02:00
Jannik Vogel
7dde13f875 Fix exception propagation for VFP double precision 2016-05-18 15:24:42 +02:00
Jannik Vogel
3a45eacb16 Fix read-after-write in SMUAD, SMLAD, SMUSD, SMLSD 2016-05-18 14:03:02 +02:00
Jannik Vogel
af37dd0d52 Set fpscr for new threads 2016-05-17 08:59:52 +02:00
Jannik Vogel
501d0bc5ed Fix ftoi behaviour 2016-05-16 15:00:45 +02:00
Jannik Vogel
6fe0cb671d Respect fpscr in ftoiz 2016-05-16 15:00:45 +02:00
Jannik Vogel
1643786c04 Disable VFP3 instructions 2016-05-16 15:00:45 +02:00
Lioncash
0f941d0245 dyncom: Reset the context into user mode correctly 
The other mode was system mode.
 2016-05-09 16:30:55 -04:00
Yuri Kunde Schlesner
e3a8292495 Common: Remove section measurement from profiler (#1731) 
This has been entirely superseded by MicroProfile. The rest of the code
can go when a simpler frametime/FPS meter is added to the GUI.
 2016-04-29 00:07:10 -07:00
mailwl
2efc1c9348 Fix BLX LR opcode interpretation 2016-04-09 19:11:02 +03:00
mailwl
4630209c4c Update cpsr (T)humb bit while creating thread 2016-04-08 18:41:09 +03:00
mailwl
06a4369f75 Fix thumb ADR instruction alignment 2016-04-06 19:46:58 +03:00
Mathew Maidment
aa6380e5bc Merge pull request #1643 from MerryMage/make_unique 
Common: Remove Common::make_unique, use std::make_unique
 2016-04-05 20:10:11 -04:00
MerryMage
a06dcfeb61 Common: Remove Common::make_unique, use std::make_unique 2016-04-05 13:31:17 +01:00
Mathew Maidment
80c16961ae Merge pull request #1618 from MerryMage/one-step 
Prevent cache overflow when single stepping
 2016-03-31 11:00:42 -04:00
MerryMage
cbba0bec7c DynCom: Optimize single stepping 2016-03-30 18:57:59 +01:00
Lioncash
d53c9cde1a armstate: Correct FIQ register banking 
FIQ has seven banked registers (R8 to R14), not two.
 2016-03-21 18:56:27 -04:00
rob turner
d29578d467 ARM_Disasm::DisassembleMemHalf: actually use width in determining opcode name 2016-01-19 18:42:16 +01:00
Lioncash
532dc797c9 arm_dyncom_dec: Fix decoding of VMLS 
Previously, all VMLS variants would misdecode as CDP
(which isn't necessarily wrong in itself, however
VMLS has it's own label of execution)
 2015-12-30 14:23:07 -05:00
Lioncash
fddfe946c8 dyncom: Handle modifying the APSR via an MRC instruction 2015-12-28 07:52:04 -05:00
Lioncash
d09b7a3c12 dyncom: Remove PC dispatch from several instructions 
These instructions aren't capable of using the PC as a destination
 2015-12-20 21:19:02 -05:00
Lioncash
5a531d7ec2 dyncom: Handle unprivileged load/store variants correctly 
LDRT/LDRBT/STRBT/STRT should simulate the load or store
as if the host CPU is in user mode.

STRT is also allowed to use the PC as an operand
 2015-12-19 19:05:50 -05:00
Lioncash
56e22e6aac dyncom: Remove static keyword from header functions 2015-12-06 15:14:51 -05:00
Lioncash
1ea0702eaa arm_interface: Make GetNumInstructions const 2015-12-06 15:07:59 -05:00