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10 Commits

Author SHA1 Message Date
Weiyi Wang
483680a124 audio_core/lle: only process pipe signal after loading 2018-12-21 20:49:22 -05:00
Weiyi Wang
6f6ffceec4 audio_core/hle,lle: implement UnloadComponent 2018-12-21 20:49:21 -05:00
Weiyi Wang
9b41e6f85f audio_core/lle: implement LoadComponent 2018-12-21 20:49:21 -05:00
Weiyi Wang
9ab4e3c686 audio_core/lle: implement GetDspMemory and SetServiceToInterrupt 2018-12-21 20:49:21 -05:00
Weiyi Wang
5c13eca700 audio_core/lle: implement PipeRead/GetPipeReadableSize 2018-12-21 20:49:20 -05:00
Weiyi Wang
e40efbf37b audio_core/lle: implement PipeWrite 2018-12-21 20:49:20 -05:00
Weiyi Wang
c9736b3300 audio_core/hle,lle: implement SetSemaphore 2018-12-21 20:49:20 -05:00
Weiyi Wang
4671ccf416 audio_core/lle: implement RecvDataIsReady 2018-12-21 20:49:19 -05:00
Weiyi Wang
b609753fb6 audio_core/lle: implement RecvData 2018-12-21 20:49:19 -05:00
Weiyi Wang
6d51d95d44 audio_core: add teakra and lle interface 2018-12-21 20:49:18 -05:00