mirror of
https://github.com/citra-emu/citra.git
synced 2024-11-25 09:20:18 +00:00
fixup! Builds on OS X now
This commit is contained in:
parent
486d14b7d8
commit
e86f27ad72
@ -68,18 +68,22 @@ inline u64 _rotr64(u64 x, unsigned int shift){
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}
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}
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#else // _MSC_VER
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#else // _MSC_VER
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#if (_MSC_VER < 1900)
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#if (_MSC_VER < 1900)
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// Function Cross-Compatibility
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// Function Cross-Compatibility
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#define snprintf _snprintf
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#define snprintf _snprintf
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#endif
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#endif
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// Locale Cross-Compatibility
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// Locale Cross-Compatibility
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#define locale_t _locale_t
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#define locale_t _locale_t
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extern "C" {
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__declspec(dllimport) void __stdcall DebugBreak(void);
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}
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#define Crash() {DebugBreak();}
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#define rotr _rotr
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#define rotl _rotl
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extern "C" {
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__declspec(dllimport) void __stdcall DebugBreak(void);
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}
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#define Crash() {DebugBreak();}
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#endif // _MSC_VER ndef
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#endif // _MSC_VER ndef
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// Generic function to get last error message.
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// Generic function to get last error message.
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@ -37,7 +37,7 @@ private:
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const std::unique_ptr<Matcher> matcher;
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const std::unique_ptr<Matcher> matcher;
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public:
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public:
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Instruction(char* name, std::unique_ptr<Matcher> matcher) : name(name), matcher(std::move(matcher)) {}
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Instruction(const char* const name, std::unique_ptr<Matcher> matcher) : matcher(std::move(matcher)), name(name) {}
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const char* const name;
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const char* const name;
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@ -31,8 +31,8 @@ namespace Impl {
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std::unique_ptr<Matcher> MakeMatcher(const char* str, std::function<void(Visitor* v, u32 instruction)> fn) {
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std::unique_ptr<Matcher> MakeMatcher(const char* str, std::function<void(Visitor* v, u32 instruction)> fn) {
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ASSERT(strlen(str) == 16);
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ASSERT(strlen(str) == 16);
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u32 mask;
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u32 mask = 0;
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u32 expect;
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u32 expect = 0;
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for (int i = 0; i < 16; i++) {
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for (int i = 0; i < 16; i++) {
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mask <<= 1;
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mask <<= 1;
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@ -445,7 +445,7 @@ const Instruction& DecodeThumb(u16 i) {
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// Example:
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// Example:
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// 000ooxxxxxxxxxxx comes before 000110oxxxxxxxxx
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// 000ooxxxxxxxxxxx comes before 000110oxxxxxxxxx
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// with a forward search direction notice how the first one will always be matched and the latter never will be.
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// with a forward search direction notice how the first one will always be matched and the latter never will be.
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return *std::find_if(thumb_instruction_table.crbegin(), thumb_instruction_table.crend(), [i](const auto& instruction) {
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return *std::find_if(thumb_instruction_table.crbegin(), thumb_instruction_table.crend(), [i](const Instruction& instruction) {
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return instruction.Match(i);
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return instruction.Match(i);
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});
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});
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}
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}
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@ -102,7 +102,7 @@ void JitX64::CompileDataProcessingHelper_Reverse(ArmReg Rn_index, ArmReg Rd_inde
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void JitX64::ADC_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
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void JitX64::ADC_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
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cond_manager.CompileCond((ConditionCode)cond);
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cond_manager.CompileCond((ConditionCode)cond);
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u32 immediate = _rotr(imm8, rotate * 2);
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u32 immediate = rotr(imm8, rotate * 2);
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CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) {
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CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) {
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code->BT(32, MJitStateCFlag(), Imm8(0));
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code->BT(32, MJitStateCFlag(), Imm8(0));
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@ -125,7 +125,7 @@ void JitX64::ADC_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
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void JitX64::ADD_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
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void JitX64::ADD_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
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cond_manager.CompileCond((ConditionCode)cond);
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cond_manager.CompileCond((ConditionCode)cond);
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u32 immediate = _rotr(imm8, rotate * 2);
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u32 immediate = rotr(imm8, rotate * 2);
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CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) {
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CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) {
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code->ADD(32, R(Rd), Imm32(immediate));
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code->ADD(32, R(Rd), Imm32(immediate));
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@ -147,7 +147,7 @@ void JitX64::ADD_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
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void JitX64::AND_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
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void JitX64::AND_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
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cond_manager.CompileCond((ConditionCode)cond);
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cond_manager.CompileCond((ConditionCode)cond);
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u32 immediate = _rotr(imm8, rotate * 2);
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u32 immediate = rotr(imm8, rotate * 2);
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CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) {
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CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) {
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code->AND(32, R(Rd), Imm32(immediate));
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code->AND(32, R(Rd), Imm32(immediate));
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@ -172,7 +172,7 @@ void JitX64::AND_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
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void JitX64::BIC_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
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void JitX64::BIC_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
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cond_manager.CompileCond((ConditionCode)cond);
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cond_manager.CompileCond((ConditionCode)cond);
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u32 immediate = _rotr(imm8, rotate * 2);
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u32 immediate = rotr(imm8, rotate * 2);
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CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) {
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CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) {
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code->AND(32, R(Rd), Imm32(~immediate));
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code->AND(32, R(Rd), Imm32(~immediate));
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@ -200,7 +200,7 @@ void JitX64::CMP_imm(Cond cond, ArmReg Rn_index, int rotate, ArmImm8 imm8) { Com
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void JitX64::EOR_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
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void JitX64::EOR_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
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cond_manager.CompileCond((ConditionCode)cond);
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cond_manager.CompileCond((ConditionCode)cond);
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u32 immediate = _rotr(imm8, rotate * 2);
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u32 immediate = rotr(imm8, rotate * 2);
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CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) {
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CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) {
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code->XOR(32, R(Rd), Imm32(immediate));
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code->XOR(32, R(Rd), Imm32(immediate));
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@ -225,7 +225,7 @@ void JitX64::EOR_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
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void JitX64::MOV_imm(Cond cond, bool S, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
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void JitX64::MOV_imm(Cond cond, bool S, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
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cond_manager.CompileCond((ConditionCode)cond);
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cond_manager.CompileCond((ConditionCode)cond);
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u32 immediate = _rotr(imm8, rotate * 2);
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u32 immediate = rotr(imm8, rotate * 2);
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if (Rd_index != 15) {
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if (Rd_index != 15) {
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reg_alloc.LockArm(Rd_index);
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reg_alloc.LockArm(Rd_index);
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@ -257,7 +257,7 @@ void JitX64::MOV_imm(Cond cond, bool S, ArmReg Rd_index, int rotate, ArmImm8 imm
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void JitX64::MVN_imm(Cond cond, bool S, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
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void JitX64::MVN_imm(Cond cond, bool S, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
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cond_manager.CompileCond((ConditionCode)cond);
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cond_manager.CompileCond((ConditionCode)cond);
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u32 immediate = _rotr(imm8, rotate * 2);
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u32 immediate = rotr(imm8, rotate * 2);
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if (Rd_index != 15) {
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if (Rd_index != 15) {
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reg_alloc.LockArm(Rd_index);
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reg_alloc.LockArm(Rd_index);
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@ -289,7 +289,7 @@ void JitX64::MVN_imm(Cond cond, bool S, ArmReg Rd_index, int rotate, ArmImm8 imm
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void JitX64::ORR_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
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void JitX64::ORR_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
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cond_manager.CompileCond((ConditionCode)cond);
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cond_manager.CompileCond((ConditionCode)cond);
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u32 immediate = _rotr(imm8, rotate * 2);
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u32 immediate = rotr(imm8, rotate * 2);
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CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) {
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CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) {
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code->OR(32, R(Rd), Imm32(immediate));
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code->OR(32, R(Rd), Imm32(immediate));
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@ -314,7 +314,7 @@ void JitX64::ORR_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
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void JitX64::RSB_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
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void JitX64::RSB_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
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cond_manager.CompileCond((ConditionCode)cond);
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cond_manager.CompileCond((ConditionCode)cond);
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u32 immediate = _rotr(imm8, rotate * 2);
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u32 immediate = rotr(imm8, rotate * 2);
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CompileDataProcessingHelper_Reverse(Rn_index, Rd_index, [&](X64Reg Rd) {
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CompileDataProcessingHelper_Reverse(Rn_index, Rd_index, [&](X64Reg Rd) {
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code->MOV(32, R(Rd), Imm32(immediate));
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code->MOV(32, R(Rd), Imm32(immediate));
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@ -345,7 +345,7 @@ void JitX64::RSB_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
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void JitX64::RSC_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
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void JitX64::RSC_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
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cond_manager.CompileCond((ConditionCode)cond);
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cond_manager.CompileCond((ConditionCode)cond);
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u32 immediate = _rotr(imm8, rotate * 2);
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u32 immediate = rotr(imm8, rotate * 2);
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CompileDataProcessingHelper_Reverse(Rn_index, Rd_index, [&](X64Reg Rd) {
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CompileDataProcessingHelper_Reverse(Rn_index, Rd_index, [&](X64Reg Rd) {
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code->MOV(32, R(Rd), Imm32(immediate));
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code->MOV(32, R(Rd), Imm32(immediate));
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@ -379,7 +379,7 @@ void JitX64::RSC_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
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void JitX64::SBC_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
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void JitX64::SBC_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
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cond_manager.CompileCond((ConditionCode)cond);
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cond_manager.CompileCond((ConditionCode)cond);
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u32 immediate = _rotr(imm8, rotate * 2);
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u32 immediate = rotr(imm8, rotate * 2);
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CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) {
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CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) {
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code->BT(32, MJitStateCFlag(), Imm8(0));
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code->BT(32, MJitStateCFlag(), Imm8(0));
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@ -404,7 +404,7 @@ void JitX64::SBC_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
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void JitX64::SUB_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
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void JitX64::SUB_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
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cond_manager.CompileCond((ConditionCode)cond);
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cond_manager.CompileCond((ConditionCode)cond);
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u32 immediate = _rotr(imm8, rotate * 2);
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u32 immediate = rotr(imm8, rotate * 2);
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CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) {
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CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) {
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code->SUB(32, R(Rd), Imm32(immediate));
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code->SUB(32, R(Rd), Imm32(immediate));
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@ -427,7 +427,7 @@ void JitX64::SUB_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
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void JitX64::TEQ_imm(Cond cond, ArmReg Rn_index, int rotate, ArmImm8 imm8) {
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void JitX64::TEQ_imm(Cond cond, ArmReg Rn_index, int rotate, ArmImm8 imm8) {
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cond_manager.CompileCond((ConditionCode)cond);
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cond_manager.CompileCond((ConditionCode)cond);
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u32 immediate = _rotr(imm8, rotate * 2);
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u32 immediate = rotr(imm8, rotate * 2);
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X64Reg Rn = reg_alloc.AllocAndLockTemp();
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X64Reg Rn = reg_alloc.AllocAndLockTemp();
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@ -457,7 +457,7 @@ void JitX64::TEQ_imm(Cond cond, ArmReg Rn_index, int rotate, ArmImm8 imm8) {
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void JitX64::TST_imm(Cond cond, ArmReg Rn_index, int rotate, ArmImm8 imm8) {
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void JitX64::TST_imm(Cond cond, ArmReg Rn_index, int rotate, ArmImm8 imm8) {
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cond_manager.CompileCond((ConditionCode)cond);
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cond_manager.CompileCond((ConditionCode)cond);
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u32 immediate = _rotr(imm8, rotate * 2);
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u32 immediate = rotr(imm8, rotate * 2);
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X64Reg Rn;
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X64Reg Rn;
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@ -4,6 +4,7 @@
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// Refer to the license.txt file included.
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// Refer to the license.txt file included.
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#include "common/assert.h"
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#include "common/assert.h"
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#include "common/make_unique.h"
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#include "common/x64/abi.h"
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#include "common/x64/abi.h"
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#include "common/x64/emitter.h"
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#include "common/x64/emitter.h"
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@ -88,7 +89,7 @@ static JitX64 compiler = { &block_of_code };
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ARM_Jit::ARM_Jit(PrivilegeMode initial_mode) {
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ARM_Jit::ARM_Jit(PrivilegeMode initial_mode) {
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ASSERT_MSG(initial_mode == PrivilegeMode::USER32MODE, "Unimplemented");
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ASSERT_MSG(initial_mode == PrivilegeMode::USER32MODE, "Unimplemented");
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state = std::make_unique<JitState>();
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state = Common::make_unique<JitState>();
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}
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}
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ARM_Jit::~ARM_Jit() {
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ARM_Jit::~ARM_Jit() {
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@ -51,7 +51,7 @@ void JitX64::CompileInterpretInstruction() {
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code->MOV(64, R(Gen::ABI_PARAM3), Imm64(current.TFlag));
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code->MOV(64, R(Gen::ABI_PARAM3), Imm64(current.TFlag));
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code->MOV(64, R(Gen::ABI_PARAM4), Imm64(current.EFlag));
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code->MOV(64, R(Gen::ABI_PARAM4), Imm64(current.EFlag));
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const void *const fn = &CallInterpreter;
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const void *const fn = reinterpret_cast<const void* const>(&CallInterpreter);
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const u64 distance = reinterpret_cast<u64>(fn) - (reinterpret_cast<u64>(code->GetCodePtr()) + 5);
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const u64 distance = reinterpret_cast<u64>(fn) - (reinterpret_cast<u64>(code->GetCodePtr()) + 5);
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if (distance >= 0x0000000080000000ULL && distance < 0xFFFFFFFF80000000ULL) {
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if (distance >= 0x0000000080000000ULL && distance < 0xFFFFFFFF80000000ULL) {
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@ -2,6 +2,7 @@
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// Licensed under GPLv2 or any later version
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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// Refer to the license.txt file included.
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#include <cstdio>
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#include <random>
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#include <random>
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#include <catch.hpp>
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#include <catch.hpp>
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@ -98,7 +99,7 @@ TEST_CASE("Fuzz ARM data processing instructions", "[JitX64]") {
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std::random_device rd;
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std::random_device rd;
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std::mt19937 mt(rd());
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std::mt19937 mt(rd());
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auto rand_int = [&mt](u32 min, u32 max) -> u32 {
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auto rand_int = [&mt](u32 min, u32 max) -> u32 {
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std::uniform_int<u32> rand(min, max);
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std::uniform_int_distribution<u32> rand(min, max);
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return rand(mt);
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return rand(mt);
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};
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};
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@ -197,6 +198,9 @@ TEST_CASE("Fuzz ARM data processing instructions", "[JitX64]") {
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FAIL();
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FAIL();
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}
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}
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if (run_number % 100 == 0) printf("%i\r", run_number);
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if (run_number % 100 == 0) {
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printf("%i\r", run_number);
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fflush(stdout);
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}
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}
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}
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}
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}
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