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fixup! Builds on OS X now

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This commit is contained in:
MerryMage 2016-03-21 21:14:31 +00:00
parent 486d14b7d8
commit e86f27ad72
7 changed files with 41 additions and 32 deletions
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18
src/common/common_funcs.h
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@ -68,18 +68,22 @@ inline u64 _rotr64(u64 x, unsigned int shift){
} }
#else // _MSC_VER #else // _MSC_VER
#if (_MSC_VER < 1900) #if (_MSC_VER < 1900)
// Function Cross-Compatibility // Function Cross-Compatibility
#define snprintf _snprintf #define snprintf _snprintf
#endif #endif
// Locale Cross-Compatibility // Locale Cross-Compatibility
#define locale_t _locale_t #define locale_t _locale_t
extern "C" { extern "C" {
__declspec(dllimport) void __stdcall DebugBreak(void); __declspec(dllimport) void __stdcall DebugBreak(void);
} }
#define Crash() {DebugBreak();} #define Crash() {DebugBreak();}
#define rotr _rotr
#define rotl _rotl
#endif // _MSC_VER ndef #endif // _MSC_VER ndef
// Generic function to get last error message. // Generic function to get last error message.

2
src/core/arm/decoder/decoder.h
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@ -37,7 +37,7 @@ private:
const std::unique_ptr<Matcher> matcher; const std::unique_ptr<Matcher> matcher;
public: public:
Instruction(char* name, std::unique_ptr<Matcher> matcher) : name(name), matcher(std::move(matcher)) {} Instruction(const char* const name, std::unique_ptr<Matcher> matcher) : matcher(std::move(matcher)), name(name) {}
const char* const name; const char* const name;

6
src/core/arm/decoder/thumb.cpp
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@ -31,8 +31,8 @@ namespace Impl {
std::unique_ptr<Matcher> MakeMatcher(const char* str, std::function<void(Visitor* v, u32 instruction)> fn) { std::unique_ptr<Matcher> MakeMatcher(const char* str, std::function<void(Visitor* v, u32 instruction)> fn) {
ASSERT(strlen(str) == 16); ASSERT(strlen(str) == 16);
u32 mask; u32 mask = 0;
u32 expect; u32 expect = 0;
for (int i = 0; i < 16; i++) { for (int i = 0; i < 16; i++) {
mask <<= 1; mask <<= 1;
@ -445,7 +445,7 @@ const Instruction& DecodeThumb(u16 i) {
// Example: // Example:
// 000ooxxxxxxxxxxx comes before 000110oxxxxxxxxx // 000ooxxxxxxxxxxx comes before 000110oxxxxxxxxx
// with a forward search direction notice how the first one will always be matched and the latter never will be. // with a forward search direction notice how the first one will always be matched and the latter never will be.
return *std::find_if(thumb_instruction_table.crbegin(), thumb_instruction_table.crend(), [i](const auto& instruction) { return *std::find_if(thumb_instruction_table.crbegin(), thumb_instruction_table.crend(), [i](const Instruction& instruction) {
return instruction.Match(i); return instruction.Match(i);
}); });
} }

28
src/core/arm/jit_x64/instructions/data_processing.cpp
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@ -102,7 +102,7 @@ void JitX64::CompileDataProcessingHelper_Reverse(ArmReg Rn_index, ArmReg Rd_inde
void JitX64::ADC_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) { void JitX64::ADC_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
cond_manager.CompileCond((ConditionCode)cond); cond_manager.CompileCond((ConditionCode)cond);
u32 immediate = _rotr(imm8, rotate * 2); u32 immediate = rotr(imm8, rotate * 2);
CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) { CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) {
code->BT(32, MJitStateCFlag(), Imm8(0)); code->BT(32, MJitStateCFlag(), Imm8(0));
@ -125,7 +125,7 @@ void JitX64::ADC_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
void JitX64::ADD_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) { void JitX64::ADD_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
cond_manager.CompileCond((ConditionCode)cond); cond_manager.CompileCond((ConditionCode)cond);
u32 immediate = _rotr(imm8, rotate * 2); u32 immediate = rotr(imm8, rotate * 2);
CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) { CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) {
code->ADD(32, R(Rd), Imm32(immediate)); code->ADD(32, R(Rd), Imm32(immediate));
@ -147,7 +147,7 @@ void JitX64::ADD_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
void JitX64::AND_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) { void JitX64::AND_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
cond_manager.CompileCond((ConditionCode)cond); cond_manager.CompileCond((ConditionCode)cond);
u32 immediate = _rotr(imm8, rotate * 2); u32 immediate = rotr(imm8, rotate * 2);
CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) { CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) {
code->AND(32, R(Rd), Imm32(immediate)); code->AND(32, R(Rd), Imm32(immediate));
@ -172,7 +172,7 @@ void JitX64::AND_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
void JitX64::BIC_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) { void JitX64::BIC_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
cond_manager.CompileCond((ConditionCode)cond); cond_manager.CompileCond((ConditionCode)cond);
u32 immediate = _rotr(imm8, rotate * 2); u32 immediate = rotr(imm8, rotate * 2);
CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) { CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) {
code->AND(32, R(Rd), Imm32(~immediate)); code->AND(32, R(Rd), Imm32(~immediate));
@ -200,7 +200,7 @@ void JitX64::CMP_imm(Cond cond, ArmReg Rn_index, int rotate, ArmImm8 imm8) { Com
void JitX64::EOR_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) { void JitX64::EOR_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
cond_manager.CompileCond((ConditionCode)cond); cond_manager.CompileCond((ConditionCode)cond);
u32 immediate = _rotr(imm8, rotate * 2); u32 immediate = rotr(imm8, rotate * 2);
CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) { CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) {
code->XOR(32, R(Rd), Imm32(immediate)); code->XOR(32, R(Rd), Imm32(immediate));
@ -225,7 +225,7 @@ void JitX64::EOR_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
void JitX64::MOV_imm(Cond cond, bool S, ArmReg Rd_index, int rotate, ArmImm8 imm8) { void JitX64::MOV_imm(Cond cond, bool S, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
cond_manager.CompileCond((ConditionCode)cond); cond_manager.CompileCond((ConditionCode)cond);
u32 immediate = _rotr(imm8, rotate * 2); u32 immediate = rotr(imm8, rotate * 2);
if (Rd_index != 15) { if (Rd_index != 15) {
reg_alloc.LockArm(Rd_index); reg_alloc.LockArm(Rd_index);
@ -257,7 +257,7 @@ void JitX64::MOV_imm(Cond cond, bool S, ArmReg Rd_index, int rotate, ArmImm8 imm
void JitX64::MVN_imm(Cond cond, bool S, ArmReg Rd_index, int rotate, ArmImm8 imm8) { void JitX64::MVN_imm(Cond cond, bool S, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
cond_manager.CompileCond((ConditionCode)cond); cond_manager.CompileCond((ConditionCode)cond);
u32 immediate = _rotr(imm8, rotate * 2); u32 immediate = rotr(imm8, rotate * 2);
if (Rd_index != 15) { if (Rd_index != 15) {
reg_alloc.LockArm(Rd_index); reg_alloc.LockArm(Rd_index);
@ -289,7 +289,7 @@ void JitX64::MVN_imm(Cond cond, bool S, ArmReg Rd_index, int rotate, ArmImm8 imm
void JitX64::ORR_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) { void JitX64::ORR_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
cond_manager.CompileCond((ConditionCode)cond); cond_manager.CompileCond((ConditionCode)cond);
u32 immediate = _rotr(imm8, rotate * 2); u32 immediate = rotr(imm8, rotate * 2);
CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) { CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) {
code->OR(32, R(Rd), Imm32(immediate)); code->OR(32, R(Rd), Imm32(immediate));
@ -314,7 +314,7 @@ void JitX64::ORR_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
void JitX64::RSB_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) { void JitX64::RSB_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
cond_manager.CompileCond((ConditionCode)cond); cond_manager.CompileCond((ConditionCode)cond);
u32 immediate = _rotr(imm8, rotate * 2); u32 immediate = rotr(imm8, rotate * 2);
CompileDataProcessingHelper_Reverse(Rn_index, Rd_index, [&](X64Reg Rd) { CompileDataProcessingHelper_Reverse(Rn_index, Rd_index, [&](X64Reg Rd) {
code->MOV(32, R(Rd), Imm32(immediate)); code->MOV(32, R(Rd), Imm32(immediate));
@ -345,7 +345,7 @@ void JitX64::RSB_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
void JitX64::RSC_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) { void JitX64::RSC_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
cond_manager.CompileCond((ConditionCode)cond); cond_manager.CompileCond((ConditionCode)cond);
u32 immediate = _rotr(imm8, rotate * 2); u32 immediate = rotr(imm8, rotate * 2);
CompileDataProcessingHelper_Reverse(Rn_index, Rd_index, [&](X64Reg Rd) { CompileDataProcessingHelper_Reverse(Rn_index, Rd_index, [&](X64Reg Rd) {
code->MOV(32, R(Rd), Imm32(immediate)); code->MOV(32, R(Rd), Imm32(immediate));
@ -379,7 +379,7 @@ void JitX64::RSC_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
void JitX64::SBC_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) { void JitX64::SBC_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
cond_manager.CompileCond((ConditionCode)cond); cond_manager.CompileCond((ConditionCode)cond);
u32 immediate = _rotr(imm8, rotate * 2); u32 immediate = rotr(imm8, rotate * 2);
CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) { CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) {
code->BT(32, MJitStateCFlag(), Imm8(0)); code->BT(32, MJitStateCFlag(), Imm8(0));
@ -404,7 +404,7 @@ void JitX64::SBC_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
void JitX64::SUB_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) { void JitX64::SUB_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int rotate, ArmImm8 imm8) {
cond_manager.CompileCond((ConditionCode)cond); cond_manager.CompileCond((ConditionCode)cond);
u32 immediate = _rotr(imm8, rotate * 2); u32 immediate = rotr(imm8, rotate * 2);
CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) { CompileDataProcessingHelper(Rn_index, Rd_index, [&](X64Reg Rd) {
code->SUB(32, R(Rd), Imm32(immediate)); code->SUB(32, R(Rd), Imm32(immediate));
@ -427,7 +427,7 @@ void JitX64::SUB_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
void JitX64::TEQ_imm(Cond cond, ArmReg Rn_index, int rotate, ArmImm8 imm8) { void JitX64::TEQ_imm(Cond cond, ArmReg Rn_index, int rotate, ArmImm8 imm8) {
cond_manager.CompileCond((ConditionCode)cond); cond_manager.CompileCond((ConditionCode)cond);
u32 immediate = _rotr(imm8, rotate * 2); u32 immediate = rotr(imm8, rotate * 2);
X64Reg Rn = reg_alloc.AllocAndLockTemp(); X64Reg Rn = reg_alloc.AllocAndLockTemp();
@ -457,7 +457,7 @@ void JitX64::TEQ_imm(Cond cond, ArmReg Rn_index, int rotate, ArmImm8 imm8) {
void JitX64::TST_imm(Cond cond, ArmReg Rn_index, int rotate, ArmImm8 imm8) { void JitX64::TST_imm(Cond cond, ArmReg Rn_index, int rotate, ArmImm8 imm8) {
cond_manager.CompileCond((ConditionCode)cond); cond_manager.CompileCond((ConditionCode)cond);
u32 immediate = _rotr(imm8, rotate * 2); u32 immediate = rotr(imm8, rotate * 2);
X64Reg Rn; X64Reg Rn;

3
src/core/arm/jit_x64/interface.cpp
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@ -4,6 +4,7 @@
// Refer to the license.txt file included. // Refer to the license.txt file included.
#include "common/assert.h" #include "common/assert.h"
#include "common/make_unique.h"
#include "common/x64/abi.h" #include "common/x64/abi.h"
#include "common/x64/emitter.h" #include "common/x64/emitter.h"
@ -88,7 +89,7 @@ static JitX64 compiler = { &block_of_code };
ARM_Jit::ARM_Jit(PrivilegeMode initial_mode) { ARM_Jit::ARM_Jit(PrivilegeMode initial_mode) {
ASSERT_MSG(initial_mode == PrivilegeMode::USER32MODE, "Unimplemented"); ASSERT_MSG(initial_mode == PrivilegeMode::USER32MODE, "Unimplemented");
state = std::make_unique<JitState>(); state = Common::make_unique<JitState>();
} }
ARM_Jit::~ARM_Jit() { ARM_Jit::~ARM_Jit() {

2
src/core/arm/jit_x64/interpret.cpp
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@ -51,7 +51,7 @@ void JitX64::CompileInterpretInstruction() {
code->MOV(64, R(Gen::ABI_PARAM3), Imm64(current.TFlag)); code->MOV(64, R(Gen::ABI_PARAM3), Imm64(current.TFlag));
code->MOV(64, R(Gen::ABI_PARAM4), Imm64(current.EFlag)); code->MOV(64, R(Gen::ABI_PARAM4), Imm64(current.EFlag));
const void *const fn = &CallInterpreter; const void *const fn = reinterpret_cast<const void* const>(&CallInterpreter);
const u64 distance = reinterpret_cast<u64>(fn) - (reinterpret_cast<u64>(code->GetCodePtr()) + 5); const u64 distance = reinterpret_cast<u64>(fn) - (reinterpret_cast<u64>(code->GetCodePtr()) + 5);
if (distance >= 0x0000000080000000ULL && distance < 0xFFFFFFFF80000000ULL) { if (distance >= 0x0000000080000000ULL && distance < 0xFFFFFFFF80000000ULL) {

8
src/tests/core/arm/jit_x64/fuzz_arm_data_processing.cpp
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@ -2,6 +2,7 @@
// Licensed under GPLv2 or any later version // Licensed under GPLv2 or any later version
// Refer to the license.txt file included. // Refer to the license.txt file included.
#include <cstdio>
#include <random> #include <random>
#include <catch.hpp> #include <catch.hpp>
@ -98,7 +99,7 @@ TEST_CASE("Fuzz ARM data processing instructions", "[JitX64]") {
std::random_device rd; std::random_device rd;
std::mt19937 mt(rd()); std::mt19937 mt(rd());
auto rand_int = [&mt](u32 min, u32 max) -> u32 { auto rand_int = [&mt](u32 min, u32 max) -> u32 {
std::uniform_int<u32> rand(min, max); std::uniform_int_distribution<u32> rand(min, max);
return rand(mt); return rand(mt);
}; };
@ -197,6 +198,9 @@ TEST_CASE("Fuzz ARM data processing instructions", "[JitX64]") {
FAIL(); FAIL();
} }
if (run_number % 100 == 0) printf("%i\r", run_number); if (run_number % 100 == 0) {
printf("%i\r", run_number);
fflush(stdout);
}
} }
} }