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Merge pull request #1059 from Subv/vertex_offset
GPU: Implemented register 0x22A PICA_REG_DRAW_VERTEX_OFFSET
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@ -235,7 +235,8 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
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for (unsigned int index = 0; index < regs.num_vertices; ++index)
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for (unsigned int index = 0; index < regs.num_vertices; ++index)
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{
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{
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unsigned int vertex = is_indexed ? (index_u16 ? index_address_16[index] : index_address_8[index]) : index;
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// Indexed rendering doesn't use the start offset
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unsigned int vertex = is_indexed ? (index_u16 ? index_address_16[index] : index_address_8[index]) : (index + regs.vertex_offset);
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// -1 is a common special value used for primitive restart. Since it's unknown if
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// -1 is a common special value used for primitive restart. Since it's unknown if
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// the PICA supports it, and it would mess up the caching, guard against it here.
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// the PICA supports it, and it would mess up the caching, guard against it here.
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@ -769,7 +769,12 @@ struct Regs {
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// Number of vertices to render
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// Number of vertices to render
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u32 num_vertices;
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u32 num_vertices;
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INSERT_PADDING_WORDS(0x5);
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INSERT_PADDING_WORDS(0x1);
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// The index of the first vertex to render
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u32 vertex_offset;
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INSERT_PADDING_WORDS(0x3);
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// These two trigger rendering of triangles
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// These two trigger rendering of triangles
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u32 trigger_draw;
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u32 trigger_draw;
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