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tests/JitX64: Initial thumb tests
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@ -9,6 +9,7 @@ if(ARCHITECTURE_x86_64)
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set(SRCS ${SRCS}
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core/arm/jit_x64/rand_int.h
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core/arm/jit_x64/fuzz_arm_data_processing.cpp
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core/arm/jit_x64/fuzz_thumb.cpp
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)
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endif()
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231
src/tests/core/arm/jit_x64/fuzz_thumb.cpp
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231
src/tests/core/arm/jit_x64/fuzz_thumb.cpp
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@ -0,0 +1,231 @@
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// Copyright 2016 Citra Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <cstdio>
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#include <cstring>
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#include <catch.hpp>
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#include "common/common_types.h"
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#include "common/scope_exit.h"
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#include "core/arm/dyncom/arm_dyncom.h"
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#include "core/arm/jit_x64/interface.h"
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#include "core/core.h"
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#include "core/memory_setup.h"
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#include "tests/core/arm/jit_x64/rand_int.h"
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std::pair<u16, u16> FromBitString16(const char* str) {
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REQUIRE(strlen(str) == 16);
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u16 bits = 0;
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u16 mask = 0;
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for (int i = 0; i < 16; i++) {
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const u16 bit = 1 << (15 - i);
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switch (str[i]) {
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case '0':
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mask |= bit;
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break;
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case '1':
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bits |= bit;
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mask |= bit;
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break;
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default:
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// Do nothing
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break;
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}
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}
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return{ bits, mask };
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}
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void FuzzJitThumb(const int instruction_count, const int run_count, const std::function<u16(int)> instruction_generator) {
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// Init core
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Core::Init();
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SCOPE_EXIT({ Core::Shutdown(); });
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// Prepare memory
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constexpr size_t MEMORY_SIZE = 4096 * 2;
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std::array<u8, MEMORY_SIZE> test_mem{};
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Memory::MapMemoryRegion(0, MEMORY_SIZE, test_mem.data());
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SCOPE_EXIT({ Memory::UnmapRegion(0, MEMORY_SIZE); });
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// Prepare test subjects
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JitX64::ARM_Jit jit(PrivilegeMode::USER32MODE);
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ARM_DynCom interp(PrivilegeMode::USER32MODE);
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SCOPE_EXIT({
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jit.FastClearCache();
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interp.ClearCache();
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});
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for (int run_number = 0; run_number < run_count; run_number++) {
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jit.FastClearCache();
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interp.ClearCache();
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u32 initial_regs[15];
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for (int i = 0; i < 15; i++) {
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u32 val = RandInt<u32>(0, 0xFFFFFFFF);
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interp.SetReg(i, val);
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jit.SetReg(i, val);
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initial_regs[i] = val;
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}
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interp.SetCPSR(0x000001d0);
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jit.SetCPSR(0x000001d0);
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interp.SetPC(0);
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jit.SetPC(0);
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Memory::Write32(0, 0xFAFFFFFF); // blx +#4 // Jump to the following code (switch to thumb)
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for (int i = 0; i < instruction_count; i++) {
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u16 inst = instruction_generator(i);
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Memory::Write16(4 + i * 2, inst);
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}
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Memory::Write16(4 + instruction_count * 2, 0xE7FE); // b +#0 // busy wait loop
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interp.ExecuteInstructions(instruction_count + 1);
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jit.ExecuteInstructions(instruction_count + 1);
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bool pass = true;
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if (interp.GetCPSR() != jit.GetCPSR()) pass = false;
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for (int i = 0; i <= 15; i++) {
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if (interp.GetReg(i) != jit.GetReg(i)) pass = false;
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}
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if (!pass) {
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printf("Failed at execution number %i\n", run_number);
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printf("\nInstruction Listing: \n");
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for (int i = 0; i < instruction_count; i++) {
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printf("%04x\n", Memory::Read16(4 + i * 2));
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}
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printf("\nFinal Register Listing: \n");
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for (int i = 0; i <= 15; i++) {
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printf("%4i: %08x %08x %s\n", i, interp.GetReg(i), jit.GetReg(i), interp.GetReg(i) != jit.GetReg(i) ? "*" : "");
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}
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printf("CPSR: %08x %08x %s\n", interp.GetCPSR(), jit.GetCPSR(), interp.GetCPSR() != jit.GetCPSR() ? "*" : "");
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printf("\nInterpreter walkthrough:\n");
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interp.ClearCache();
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interp.SetPC(0);
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interp.SetCPSR(0x000001d0);
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for (int i = 0; i < 15; i++) {
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interp.SetReg(i, initial_regs[i]);
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printf("%4i: %08x\n", i, interp.GetReg(i));
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}
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for (int inst = 0; inst < instruction_count; inst++) {
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interp.Step();
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for (int i = 0; i <= 15; i++) {
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printf("%4i: %08x\n", i, interp.GetReg(i));
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}
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printf("CPSR: %08x\n", interp.GetCPSR());
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}
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#ifdef _MSC_VER
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DebugBreak();
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#endif
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FAIL();
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}
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printf("%i\r", run_number);
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if (run_number % 50 == 0) {
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fflush(stdout);
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}
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}
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}
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// Things not yet tested:
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// FromBitString16("01001xxxxxxxxxxx"), // LDR Rd, [PC, #]
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// FromBitString16("101101100101x000"), // SETEND
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// FromBitString16("10111110xxxxxxxx"), // BKPT
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// FromBitString16("0101oooxxxxxxxxx"), // LDR/STR
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// FromBitString16("011xxxxxxxxxxxxx"), // loads/stores
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// FromBitString16("1000xxxxxxxxxxxx"), // loads/stores
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// FromBitString16("1001xxxxxxxxxxxx"), // loads/stores
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// FromBitString16("1011x10xxxxxxxxx"), // push/pop
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// FromBitString16("10110110011x0xxx"), // CPS
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// FromBitString16("1100xxxxxxxxxxxx"), // STMIA/LDMIA
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// FromBitString16("11011111xxxxxxxx"), // SWI
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// FromBitString16("1101xxxxxxxxxxxx"), // B<cond>
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TEST_CASE("Fuzz Thumb instructions set 1 (pure computation)", "[JitX64][Thumb]") {
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const std::array<std::pair<u16, u16>, 16> instructions = {{
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FromBitString16("00000xxxxxxxxxxx"), // LSL <Rd>, <Rm>, #<imm5>
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FromBitString16("00001xxxxxxxxxxx"), // LSR <Rd>, <Rm>, #<imm5>
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FromBitString16("00010xxxxxxxxxxx"), // ASR <Rd>, <Rm>, #<imm5>
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FromBitString16("000110oxxxxxxxxx"), // ADD/SUB_reg
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FromBitString16("000111oxxxxxxxxx"), // ADD/SUB_imm
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FromBitString16("001ooxxxxxxxxxxx"), // ADD/SUB/CMP/MOV_imm
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FromBitString16("010000ooooxxxxxx"), // Data Processing
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FromBitString16("010001000hxxxxxx"), // ADD (high registers)
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FromBitString16("010001010hxxxxxx"), // CMP (high registers)
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FromBitString16("01000101h0xxxxxx"), // CMP (high registers)
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FromBitString16("010001100hxxxxxx"), // MOV (high registers)
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FromBitString16("10110000oxxxxxxx"), // Adjust stack pointer
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FromBitString16("10110010ooxxxxxx"), // SXT/UXT
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FromBitString16("1011101000xxxxxx"), // REV
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FromBitString16("1011101001xxxxxx"), // REV16
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FromBitString16("1011101011xxxxxx"), // REVSH
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}};
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auto instruction_select = [&](int) -> u16 {
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size_t inst_index = RandInt<size_t>(0, instructions.size() - 1);
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u16 random = RandInt<u16>(0, 0xFFFF);
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return instructions[inst_index].first | (random &~ instructions[inst_index].second);
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};
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SECTION("short blocks") {
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FuzzJitThumb(5, 10000, instruction_select);
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}
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SECTION("long blocks") {
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FuzzJitThumb(1024, 15, instruction_select);
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}
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}
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TEST_CASE("Fuzz Thumb instructions set 2 (affects PC)", "[JitX64][Thumb]") {
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const std::array<std::pair<u16, u16>, 5> instructions = {{
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FromBitString16("01000111xxxxx000"), // BLX/BX
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FromBitString16("1010oxxxxxxxxxxx"), // add to pc/sp
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FromBitString16("11100xxxxxxxxxxx"), // B
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FromBitString16("01000100h0xxxxxx"), // ADD (high registers)
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FromBitString16("01000110h0xxxxxx"), // MOV (high registers)
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}};
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auto instruction_select = [&](int) -> u16 {
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size_t inst_index = RandInt<size_t>(0, instructions.size() - 1);
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u16 random = RandInt<u16>(0, 0xFFFF);
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return instructions[inst_index].first | (random &~ instructions[inst_index].second);
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};
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FuzzJitThumb(1, 10000, instruction_select);
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}
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TEST_CASE("Fuzz Thumb instructions set 3 (32-bit BL/BLX)", "[JitX64][Thumb]") {
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auto instruction_select = [&](int i) -> u16 {
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std::pair<u16, u16> inst_info;
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if (i == 0) {
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// BL / BLX prefix
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inst_info = FromBitString16("11110xxxxxxxxxxx");
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} else {
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// BL / BLX suffix
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inst_info = RandInt(0, 1) ? FromBitString16("11101xxxxxxxxxx0") : FromBitString16("11111xxxxxxxxxxx");
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}
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u16 random = RandInt<u16>(0, 0xFFFF);
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return inst_info.first | (random &~ inst_info.second);
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};
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FuzzJitThumb(1, 1000, instruction_select);
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}
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