diff --git a/src/core/arm/jit_x64/common.h b/src/core/arm/jit_x64/common.h index c667138f4..9b7291295 100644 --- a/src/core/arm/jit_x64/common.h +++ b/src/core/arm/jit_x64/common.h @@ -34,7 +34,6 @@ struct JitState { u64 save_host_RSP; u64 return_RIP; - void* page_table; s32 cycles_remaining; }; diff --git a/src/core/arm/jit_x64/interface.cpp b/src/core/arm/jit_x64/interface.cpp index e6685d197..681385114 100644 --- a/src/core/arm/jit_x64/interface.cpp +++ b/src/core/arm/jit_x64/interface.cpp @@ -161,8 +161,6 @@ void ARM_Jit::ExecuteInstructions(int num_instructions) { reschedule = false; do { - //state->page_table = reinterpret_cast(Memory::current_page_table->pointers.data()); - bool EFlag = (state->cpu_state.Cpsr >> 9) & 1; state->cpu_state.TFlag = (state->cpu_state.Cpsr >> 5) & 1; diff --git a/src/core/arm/jit_x64/reg_alloc.cpp b/src/core/arm/jit_x64/reg_alloc.cpp index ee346b3e9..d05a8fff0 100644 --- a/src/core/arm/jit_x64/reg_alloc.cpp +++ b/src/core/arm/jit_x64/reg_alloc.cpp @@ -32,7 +32,7 @@ static const std::map x64_reg_to_index = { constexpr Gen::X64Reg jit_state_reg = Gen::R15; -Gen::X64Reg RegAlloc::JitStateReg() { +Gen::X64Reg RegAlloc::JitStateReg() const { return jit_state_reg; } @@ -46,10 +46,6 @@ static Gen::OpArg MJitStateCpuReg(ArmReg arm_reg) { return Gen::MDisp(jit_state_reg, offsetof(JitState, cpu_state) + offsetof(ARMul_State, Reg) + (arm_reg) * sizeof(u32)); } -static Gen::OpArg MJitStateMemoryMap() { - return Gen::MDisp(jit_state_reg, offsetof(JitState, page_table)); -} - void RegAlloc::Init(Gen::XEmitter* emitter) { code = emitter; @@ -72,7 +68,6 @@ void RegAlloc::FlushX64(Gen::X64Reg x64_reg) { switch (state.state) { case X64State::State::Free: - case X64State::State::MemoryMap: case X64State::State::Temp: state.state = X64State::State::Free; break; @@ -330,38 +325,6 @@ void RegAlloc::UnlockTemp(Gen::X64Reg x64_reg) { x64_state.state = X64State::State::Free; } -Gen::X64Reg RegAlloc::LoadMemoryMap() { - // First check to see if it exists. - for (auto i : x64_reg_to_index) { - X64State& x64_state = x64_gpr[i.second]; - - if (x64_state.state == X64State::State::MemoryMap) { - ASSERT(!x64_state.locked); - x64_state.locked = true; - return i.first; - } - } - - // Otherwise allocate it. - const Gen::X64Reg x64_reg = AllocReg(); - X64State& x64_state = x64_gpr[x64_reg_to_index.at(x64_reg)]; - x64_state.locked = true; - x64_state.state = X64State::State::MemoryMap; - - code->MOV(64, R(x64_reg), MJitStateMemoryMap()); - - return x64_reg; -} - -void RegAlloc::UnlockMemoryMap(Gen::X64Reg x64_reg) { - X64State& x64_state = x64_gpr[x64_reg_to_index.at(x64_reg)]; - - ASSERT(x64_state.locked); - ASSERT(x64_state.state == X64State::State::MemoryMap); - - x64_state.locked = false; -} - void RegAlloc::AssertNoLocked() { for (ArmReg arm_reg = 0; arm_reg < arm_gpr.size(); arm_reg++) { ArmState& arm_state = arm_gpr[arm_reg]; diff --git a/src/core/arm/jit_x64/reg_alloc.h b/src/core/arm/jit_x64/reg_alloc.h index f8df7f8d2..66e09f16e 100644 --- a/src/core/arm/jit_x64/reg_alloc.h +++ b/src/core/arm/jit_x64/reg_alloc.h @@ -42,7 +42,6 @@ private: * CleanArmReg (arm_reg is valid): This x64 reg is bound to an ARM reg. * It hasn't been written to (i.e.: value is still the same as the in-memory version). * This value WILL NOT be flushed back to memory. - * MemoryMap: This value holds a pointer to the ARM page table (currently unimplemented). * UserManuallyLocked: User has called LockX64 on this register. User must call UnlockX64 to unlock. */ struct X64State { @@ -51,7 +50,6 @@ private: Temp, DirtyArmReg, CleanArmReg, - MemoryMap, UserManuallyLocked }; @@ -142,17 +140,10 @@ public: /// Releases a temporary register void UnlockTemp(Gen::X64Reg x64_reg); - // Page table: - - /// Gets the x64 register with the address of the memory map in it. Allocates one if one doesn't already exist. - Gen::X64Reg LoadMemoryMap(); - /// Releases the memory map register. - void UnlockMemoryMap(Gen::X64Reg x64_reg); - // JitState pointer: /// Returns the register in which the JitState pointer is stored. - Gen::X64Reg JitStateReg(); + Gen::X64Reg JitStateReg() const; // Flush: