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fixup! JitX64: reinterpret_cast<const void* const> -> reinterpret_cast<const void*>

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This commit is contained in:
MerryMage 2016-04-06 21:02:55 +01:00
parent 559afdaecf
commit c3967e798b
5 changed files with 35 additions and 35 deletions
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4
src/core/arm/decoder/decoder.h
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@ -50,7 +50,7 @@ class ArmInstruction final {
public:
ArmInstruction(const char* const name, std::unique_ptr<ArmMatcher> matcher) : name(name), matcher(std::move(matcher)) {}
const char* const Name() const {
const char* Name() const {
return name;
}
@ -85,7 +85,7 @@ class ThumbInstruction final {
public:
ThumbInstruction(const char* const name, ThumbMatcher&& matcher) : name(name), matcher(std::move(matcher)) {}
const char* const Name() const {
const char* Name() const {
return name;
}

4
src/core/arm/jit_x64/instructions/exception_generating.cpp
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@ -26,7 +26,7 @@ void JitX64::BKPT(Cond cond, ArmImm12 imm12, ArmImm4 imm4) {
reg_alloc.LockX64(ABI_PARAM1);
code->MOV(32, R(ABI_PARAM1), Imm32((imm12 << 4) | imm4));
CompileCallHost(reinterpret_cast<const void* const>(&Breakpoint));
CompileCallHost(reinterpret_cast<const void*>(&Breakpoint));
reg_alloc.UnlockX64(ABI_PARAM1);
@ -46,7 +46,7 @@ void JitX64::SVC(Cond cond, ArmImm24 imm24) {
reg_alloc.LockX64(ABI_PARAM1);
code->MOV(64, R(ABI_PARAM1), Imm32(imm24));
CompileCallHost(reinterpret_cast<const void* const>(&ServiceCall));
CompileCallHost(reinterpret_cast<const void*>(&ServiceCall));
reg_alloc.UnlockX64(ABI_PARAM1);
// Some service calls require a task switch, so go back to the dispatcher to check.

44
src/core/arm/jit_x64/instructions/load_store.cpp
View File

@ -219,7 +219,7 @@ void JitX64::LDR_imm(Cond cond, bool P, bool U, bool W, ArmReg Rn_index, ArmReg
&JitX64::LoadAndStoreWordOrUnsignedByte_ImmediatePostIndexed,
U, Rn_index, imm12);
CompileCallHost(reinterpret_cast<const void* const>(!current.EFlag ? &Load32LE : &Load32BE));
CompileCallHost(reinterpret_cast<const void*>(!current.EFlag ? &Load32LE : &Load32BE));
reg_alloc.UnlockX64(ABI_PARAM1);
reg_alloc.LockX64(ABI_RETURN);
@ -249,7 +249,7 @@ void JitX64::LDR_reg(Cond cond, bool P, bool U, bool W, ArmReg Rn_index, ArmReg
&JitX64::LoadAndStoreWordOrUnsignedByte_ScaledRegisterPostIndexed,
U, Rn_index, imm5, shift, Rm_index);
CompileCallHost(reinterpret_cast<const void* const>(!current.EFlag ? &Load32LE : &Load32BE));
CompileCallHost(reinterpret_cast<const void*>(!current.EFlag ? &Load32LE : &Load32BE));
reg_alloc.UnlockX64(ABI_PARAM1);
reg_alloc.LockX64(ABI_RETURN);
@ -283,7 +283,7 @@ void JitX64::LDRB_imm(Cond cond, bool P, bool U, bool W, ArmReg Rn_index, ArmReg
&JitX64::LoadAndStoreWordOrUnsignedByte_ImmediatePostIndexed,
U, Rn_index, imm12);
CompileCallHost(reinterpret_cast<const void* const>(&Load8));
CompileCallHost(reinterpret_cast<const void*>(&Load8));
reg_alloc.UnlockX64(ABI_PARAM1);
reg_alloc.LockX64(ABI_RETURN);
@ -311,7 +311,7 @@ void JitX64::LDRB_reg(Cond cond, bool P, bool U, bool W, ArmReg Rn_index, ArmReg
&JitX64::LoadAndStoreWordOrUnsignedByte_ScaledRegisterPostIndexed,
U, Rn_index, imm5, shift, Rm_index);
CompileCallHost(reinterpret_cast<const void* const>(&Load8));
CompileCallHost(reinterpret_cast<const void*>(&Load8));
reg_alloc.UnlockX64(ABI_PARAM1);
reg_alloc.LockX64(ABI_RETURN);
@ -344,7 +344,7 @@ void JitX64::STR_imm(Cond cond, bool P, bool U, bool W, ArmReg Rn_index, ArmReg
GetValueOfRegister(code, reg_alloc, GetReg15Value(), ABI_PARAM2, Rd_index);
CompileCallHost(reinterpret_cast<const void* const>(!current.EFlag ? &Store32LE : &Store32BE));
CompileCallHost(reinterpret_cast<const void*>(!current.EFlag ? &Store32LE : &Store32BE));
reg_alloc.UnlockX64(ABI_PARAM1);
reg_alloc.UnlockX64(ABI_PARAM2);
@ -370,7 +370,7 @@ void JitX64::STR_reg(Cond cond, bool P, bool U, bool W, ArmReg Rn_index, ArmReg
GetValueOfRegister(code, reg_alloc, GetReg15Value(), ABI_PARAM2, Rd_index);
CompileCallHost(reinterpret_cast<const void* const>(!current.EFlag ? &Store32LE : &Store32BE));
CompileCallHost(reinterpret_cast<const void*>(!current.EFlag ? &Store32LE : &Store32BE));
reg_alloc.UnlockX64(ABI_PARAM1);
reg_alloc.UnlockX64(ABI_PARAM2);
@ -396,7 +396,7 @@ void JitX64::STRB_imm(Cond cond, bool P, bool U, bool W, ArmReg Rn_index, ArmReg
GetValueOfRegister(code, reg_alloc, GetReg15Value(), ABI_PARAM2, Rd_index);
CompileCallHost(reinterpret_cast<const void* const>(&Store8));
CompileCallHost(reinterpret_cast<const void*>(&Store8));
reg_alloc.UnlockX64(ABI_PARAM1);
reg_alloc.UnlockX64(ABI_PARAM2);
@ -422,7 +422,7 @@ void JitX64::STRB_reg(Cond cond, bool P, bool U, bool W, ArmReg Rn_index, ArmReg
GetValueOfRegister(code, reg_alloc, GetReg15Value(), ABI_PARAM2, Rd_index);
CompileCallHost(reinterpret_cast<const void* const>(&Store8));
CompileCallHost(reinterpret_cast<const void*>(&Store8));
reg_alloc.UnlockX64(ABI_PARAM1);
reg_alloc.UnlockX64(ABI_PARAM2);
@ -475,7 +475,7 @@ void JitX64::LDRD_imm(Cond cond, bool P, bool U, bool W, ArmReg Rn_index, ArmReg
&JitX64::LoadAndStoreWordOrUnsignedByte_ImmediatePostIndexed,
U, Rn_index, CombineImm8ab(imm8a, imm8b));
CompileCallHost(reinterpret_cast<const void* const>(!current.EFlag ? &Load64LE : &Load64BE));
CompileCallHost(reinterpret_cast<const void*>(!current.EFlag ? &Load64LE : &Load64BE));
reg_alloc.UnlockX64(ABI_PARAM1);
reg_alloc.LockX64(ABI_RETURN);
@ -508,7 +508,7 @@ void JitX64::LDRD_reg(Cond cond, bool P, bool U, bool W, ArmReg Rn_index, ArmReg
&JitX64::LoadAndStoreWordOrUnsignedByte_ScaledRegisterPostIndexed,
U, Rn_index, 0, ShiftType::LSL, Rm_index);
CompileCallHost(reinterpret_cast<const void* const>(!current.EFlag ? &Load64LE : &Load64BE));
CompileCallHost(reinterpret_cast<const void*>(!current.EFlag ? &Load64LE : &Load64BE));
reg_alloc.UnlockX64(ABI_PARAM1);
reg_alloc.LockX64(ABI_RETURN);
@ -539,7 +539,7 @@ void JitX64::LDRH_imm(Cond cond, bool P, bool U, bool W, ArmReg Rn_index, ArmReg
&JitX64::LoadAndStoreWordOrUnsignedByte_ImmediatePostIndexed,
U, Rn_index, CombineImm8ab(imm8a, imm8b));
CompileCallHost(reinterpret_cast<const void* const>(!current.EFlag ? &Load16LE : &Load16BE));
CompileCallHost(reinterpret_cast<const void*>(!current.EFlag ? &Load16LE : &Load16BE));
reg_alloc.UnlockX64(ABI_PARAM1);
reg_alloc.LockX64(ABI_RETURN);
@ -566,7 +566,7 @@ void JitX64::LDRH_reg(Cond cond, bool P, bool U, bool W, ArmReg Rn_index, ArmReg
&JitX64::LoadAndStoreWordOrUnsignedByte_ScaledRegisterPostIndexed,
U, Rn_index, 0, ShiftType::LSL, Rm_index);
CompileCallHost(reinterpret_cast<const void* const>(!current.EFlag ? &Load16LE : &Load16BE));
CompileCallHost(reinterpret_cast<const void*>(!current.EFlag ? &Load16LE : &Load16BE));
reg_alloc.UnlockX64(ABI_PARAM1);
reg_alloc.LockX64(ABI_RETURN);
@ -593,7 +593,7 @@ void JitX64::LDRSB_imm(Cond cond, bool P, bool U, bool W, ArmReg Rn_index, ArmRe
&JitX64::LoadAndStoreWordOrUnsignedByte_ImmediatePostIndexed,
U, Rn_index, CombineImm8ab(imm8a, imm8b));
CompileCallHost(reinterpret_cast<const void* const>(&Load8));
CompileCallHost(reinterpret_cast<const void*>(&Load8));
reg_alloc.UnlockX64(ABI_PARAM1);
reg_alloc.LockX64(ABI_RETURN);
@ -620,7 +620,7 @@ void JitX64::LDRSB_reg(Cond cond, bool P, bool U, bool W, ArmReg Rn_index, ArmRe
&JitX64::LoadAndStoreWordOrUnsignedByte_ScaledRegisterPostIndexed,
U, Rn_index, 0, ShiftType::LSL, Rm_index);
CompileCallHost(reinterpret_cast<const void* const>(&Load8));
CompileCallHost(reinterpret_cast<const void*>(&Load8));
reg_alloc.UnlockX64(ABI_PARAM1);
reg_alloc.LockX64(ABI_RETURN);
@ -647,7 +647,7 @@ void JitX64::LDRSH_imm(Cond cond, bool P, bool U, bool W, ArmReg Rn_index, ArmRe
&JitX64::LoadAndStoreWordOrUnsignedByte_ImmediatePostIndexed,
U, Rn_index, CombineImm8ab(imm8a, imm8b));
CompileCallHost(reinterpret_cast<const void* const>(!current.EFlag ? &Load16LE : &Load16BE));
CompileCallHost(reinterpret_cast<const void*>(!current.EFlag ? &Load16LE : &Load16BE));
reg_alloc.UnlockX64(ABI_PARAM1);
reg_alloc.LockX64(ABI_RETURN);
@ -674,7 +674,7 @@ void JitX64::LDRSH_reg(Cond cond, bool P, bool U, bool W, ArmReg Rn_index, ArmRe
&JitX64::LoadAndStoreWordOrUnsignedByte_ScaledRegisterPostIndexed,
U, Rn_index, 0, ShiftType::LSL, Rm_index);
CompileCallHost(reinterpret_cast<const void* const>(!current.EFlag ? &Load16LE : &Load16BE));
CompileCallHost(reinterpret_cast<const void*>(!current.EFlag ? &Load16LE : &Load16BE));
reg_alloc.UnlockX64(ABI_PARAM1);
reg_alloc.LockX64(ABI_RETURN);
@ -708,7 +708,7 @@ void JitX64::STRD_imm(Cond cond, bool P, bool U, bool W, ArmReg Rn_index, ArmReg
GetValueOfRegister(code, reg_alloc, GetReg15Value(), ABI_PARAM2, Rd_index + 0);
GetValueOfRegister(code, reg_alloc, GetReg15Value(), ABI_PARAM3, Rd_index + 1);
CompileCallHost(reinterpret_cast<const void* const>(!current.EFlag ? &Store64LE : &Store64BE));
CompileCallHost(reinterpret_cast<const void*>(!current.EFlag ? &Store64LE : &Store64BE));
reg_alloc.UnlockX64(ABI_PARAM1);
reg_alloc.UnlockX64(ABI_PARAM2);
@ -739,7 +739,7 @@ void JitX64::STRD_reg(Cond cond, bool P, bool U, bool W, ArmReg Rn_index, ArmReg
GetValueOfRegister(code, reg_alloc, GetReg15Value(), ABI_PARAM2, Rd_index + 0);
GetValueOfRegister(code, reg_alloc, GetReg15Value(), ABI_PARAM3, Rd_index + 1);
CompileCallHost(reinterpret_cast<const void* const>(!current.EFlag ? &Store64LE : &Store64BE));
CompileCallHost(reinterpret_cast<const void*>(!current.EFlag ? &Store64LE : &Store64BE));
reg_alloc.UnlockX64(ABI_PARAM1);
reg_alloc.UnlockX64(ABI_PARAM2);
@ -766,7 +766,7 @@ void JitX64::STRH_imm(Cond cond, bool P, bool U, bool W, ArmReg Rn_index, ArmReg
GetValueOfRegister(code, reg_alloc, GetReg15Value(), ABI_PARAM2, Rd_index);
CompileCallHost(reinterpret_cast<const void* const>(!current.EFlag ? &Store16LE : &Store16BE));
CompileCallHost(reinterpret_cast<const void*>(!current.EFlag ? &Store16LE : &Store16BE));
reg_alloc.UnlockX64(ABI_PARAM1);
reg_alloc.UnlockX64(ABI_PARAM2);
@ -792,7 +792,7 @@ void JitX64::STRH_reg(Cond cond, bool P, bool U, bool W, ArmReg Rn_index, ArmReg
GetValueOfRegister(code, reg_alloc, GetReg15Value(), ABI_PARAM2, Rd_index);
CompileCallHost(reinterpret_cast<const void* const>(!current.EFlag ? &Store16LE : &Store16BE));
CompileCallHost(reinterpret_cast<const void*>(!current.EFlag ? &Store16LE : &Store16BE));
reg_alloc.UnlockX64(ABI_PARAM1);
reg_alloc.UnlockX64(ABI_PARAM2);
@ -964,7 +964,7 @@ void JitX64::LDM(Cond cond, bool P, bool U, bool W, ArmReg Rn_index, ArmRegList
// TODO: Optimize
LoadAndStoreMultiple_Helper(code, reg_alloc, P, U, W, Rn_index, list,
[this](){ CompileCallHost(reinterpret_cast<const void* const>(!current.EFlag ? &ExecuteLDMLE : &ExecuteLDMBE)); });
[this](){ CompileCallHost(reinterpret_cast<const void*>(!current.EFlag ? &ExecuteLDMLE : &ExecuteLDMBE)); });
current.arm_pc += GetInstSize();
if (list & (1 << 15)) {
@ -1022,7 +1022,7 @@ void JitX64::STM(Cond cond, bool P, bool U, bool W, ArmReg Rn_index, ArmRegList
// TODO: Optimize
LoadAndStoreMultiple_Helper(code, reg_alloc, P, U, W, Rn_index, list,
[this](){ CompileCallHost(reinterpret_cast<const void* const>(!current.EFlag ? &ExecuteSTMLE : &ExecuteSTMBE)); });
[this](){ CompileCallHost(reinterpret_cast<const void*>(!current.EFlag ? &ExecuteSTMLE : &ExecuteSTMBE)); });
current.arm_pc += GetInstSize();
}

16
src/core/arm/jit_x64/instructions/synchronisation.cpp
View File

@ -47,7 +47,7 @@ void JitX64::LDREX(Cond cond, ArmReg Rn_index, ArmReg Rd_index) {
ASSERT_MSG(Rn_index != ArmReg::PC && Rd_index != ArmReg::PC, "UNPREDICTABLE");
ExclusiveLoadCommon(code, reg_alloc, MJitStateExclusiveState(), MJitStateExclusiveTag(), Rn_index, Rd_index);
CompileCallHost(reinterpret_cast<const void* const>(!current.EFlag ? &Load32LE : &Load32BE));
CompileCallHost(reinterpret_cast<const void*>(!current.EFlag ? &Load32LE : &Load32BE));
reg_alloc.LockX64(ABI_RETURN);
@ -66,7 +66,7 @@ void JitX64::LDREXB(Cond cond, ArmReg Rn_index, ArmReg Rd_index) {
ASSERT_MSG(Rn_index != ArmReg::PC && Rd_index != ArmReg::PC, "UNPREDICTABLE");
ExclusiveLoadCommon(code, reg_alloc, MJitStateExclusiveState(), MJitStateExclusiveTag(), Rn_index, Rd_index);
CompileCallHost(reinterpret_cast<const void* const>(&Load8));
CompileCallHost(reinterpret_cast<const void*>(&Load8));
reg_alloc.LockX64(ABI_RETURN);
@ -87,7 +87,7 @@ void JitX64::LDREXD(Cond cond, ArmReg Rn_index, ArmReg Rd_index) {
ASSERT_MSG(Rn_index != ArmReg::PC, "UNPREDICTABLE");
ExclusiveLoadCommon(code, reg_alloc, MJitStateExclusiveState(), MJitStateExclusiveTag(), Rn_index, Rd_index);
CompileCallHost(reinterpret_cast<const void* const>(!current.EFlag ? Load64LE : Load64BE));
CompileCallHost(reinterpret_cast<const void*>(!current.EFlag ? Load64LE : Load64BE));
reg_alloc.LockX64(ABI_RETURN);
@ -110,7 +110,7 @@ void JitX64::LDREXH(Cond cond, ArmReg Rn_index, ArmReg Rd_index) {
ASSERT_MSG(Rn_index != ArmReg::PC && Rd_index != ArmReg::PC, "UNPREDICTABLE");
ExclusiveLoadCommon(code, reg_alloc, MJitStateExclusiveState(), MJitStateExclusiveTag(), Rn_index, Rd_index);
CompileCallHost(reinterpret_cast<const void* const>(!current.EFlag ? Load16LE : Load16BE));
CompileCallHost(reinterpret_cast<const void*>(!current.EFlag ? Load16LE : Load16BE));
reg_alloc.LockX64(ABI_RETURN);
@ -173,7 +173,7 @@ void JitX64::STREX(Cond cond, ArmReg Rn_index, ArmReg Rd_index, ArmReg Rm_index)
Rn_index, Rd_index,
[&](){
code->MOV(32, R(ABI_PARAM2), Rm);
CompileCallHost(reinterpret_cast<const void* const>(!current.EFlag ? &Store32LE : &Store32BE));
CompileCallHost(reinterpret_cast<const void*>(!current.EFlag ? &Store32LE : &Store32BE));
});
reg_alloc.UnlockArm(Rm_index);
@ -204,7 +204,7 @@ void JitX64::STREXB(Cond cond, ArmReg Rn_index, ArmReg Rd_index, ArmReg Rm_index
Rn_index, Rd_index,
[&]() {
code->MOV(32, R(ABI_PARAM2), Rm);
CompileCallHost(reinterpret_cast<const void* const>(&Store8));
CompileCallHost(reinterpret_cast<const void*>(&Store8));
});
reg_alloc.UnlockArm(Rm_index);
@ -242,7 +242,7 @@ void JitX64::STREXD(Cond cond, ArmReg Rn_index, ArmReg Rd_index, ArmReg Rm_index
[&]() {
code->MOV(32, R(ABI_PARAM2), Rm0);
code->MOV(32, R(ABI_PARAM3), Rm1);
CompileCallHost(reinterpret_cast<const void* const>(!current.EFlag ? &Store64LE : &Store64BE));
CompileCallHost(reinterpret_cast<const void*>(!current.EFlag ? &Store64LE : &Store64BE));
});
reg_alloc.UnlockArm(Rm_index + 1);
@ -275,7 +275,7 @@ void JitX64::STREXH(Cond cond, ArmReg Rn_index, ArmReg Rd_index, ArmReg Rm_index
Rn_index, Rd_index,
[&]() {
code->MOV(32, R(ABI_PARAM2), Rm);
CompileCallHost(reinterpret_cast<const void* const>(!current.EFlag ? &Store16LE : &Store16BE));
CompileCallHost(reinterpret_cast<const void*>(!current.EFlag ? &Store16LE : &Store16BE));
});
reg_alloc.UnlockArm(Rm_index);

2
src/core/arm/jit_x64/interpret.cpp
View File

@ -49,7 +49,7 @@ void JitX64::CompileInterpretInstruction() {
code->MOV(64, R(ABI_PARAM3), Imm64(current.TFlag));
code->MOV(64, R(ABI_PARAM4), Imm64(current.EFlag));
CompileCallHost(reinterpret_cast<const void* const>(&CallInterpreter));
CompileCallHost(reinterpret_cast<const void*>(&CallInterpreter));
code->MOV(64, R(reg_alloc.JitStateReg()), R(ABI_RETURN));