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gcc 11 compatibility fix

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This commit is contained in:
thesource 2021-04-29 12:02:19 +03:00
parent 86b775bd8f
commit bf5711d944
2 changed files with 55 additions and 23 deletions
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1
src/common/ring_buffer.h
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@ -4,6 +4,7 @@
#pragma once
#include <limits>
#include <algorithm>
#include <array>
#include <atomic>

45
src/core/hle/service/gsp/gsp_gpu.cpp
View File

@ -282,30 +282,61 @@ ResultCode SetBufferSwap(u32 screen_id, const FrameBufferInfo& info) {
u32 base_address = 0x400000;
PAddr phys_address_left = VirtualToPhysicalAddress(info.address_left);
PAddr phys_address_right = VirtualToPhysicalAddress(info.address_right);
switch(screen_id)
{
case 0:
if (info.active_fb == 0) {
WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(
framebuffer_config[screen_id].address_left1)),
framebuffer_config[0].address_left1)),
phys_address_left);
WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(
framebuffer_config[screen_id].address_right1)),
framebuffer_config[0].address_right1)),
phys_address_right);
} else {
WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(
framebuffer_config[screen_id].address_left2)),
framebuffer_config[0].address_left2)),
phys_address_left);
WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(
framebuffer_config[screen_id].address_right2)),
framebuffer_config[0].address_right2)),
phys_address_right);
}
WriteSingleHWReg(base_address +
4 * static_cast<u32>(GPU_REG_INDEX(framebuffer_config[screen_id].stride)),
4 * static_cast<u32>(GPU_REG_INDEX(framebuffer_config[0].stride)),
info.stride);
WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(
framebuffer_config[screen_id].color_format)),
framebuffer_config[0].color_format)),
info.format);
WriteSingleHWReg(
base_address + 4 * static_cast<u32>(GPU_REG_INDEX(framebuffer_config[screen_id].active_fb)),
base_address + 4 * static_cast<u32>(GPU_REG_INDEX(framebuffer_config[0].active_fb)),
info.shown_fb);
break;
case 1:
if (info.active_fb == 0) {
WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(
framebuffer_config[1].address_left1)),
phys_address_left);
WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(
framebuffer_config[1].address_right1)),
phys_address_right);
} else {
WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(
framebuffer_config[1].address_left2)),
phys_address_left);
WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(
framebuffer_config[1].address_right2)),
phys_address_right);
}
WriteSingleHWReg(base_address +
4 * static_cast<u32>(GPU_REG_INDEX(framebuffer_config[1].stride)),
info.stride);
WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(
framebuffer_config[1].color_format)),
info.format);
WriteSingleHWReg(
base_address + 4 * static_cast<u32>(GPU_REG_INDEX(framebuffer_config[1].active_fb)),
info.shown_fb);
break;
}
if (Pica::g_debug_context)
Pica::g_debug_context->OnEvent(Pica::DebugContext::Event::BufferSwapped, nullptr);