mirror of
https://github.com/citra-emu/citra.git
synced 2024-11-27 00:00:08 +00:00
armemu: Fix SXTAB
This commit is contained in:
parent
efebd5589a
commit
b5dbd6f2a2
@ -6044,7 +6044,7 @@ L_stm_s_takeabort:
|
|||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF);
|
Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF) | ((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFF) & 0xFF;
|
||||||
if (Rm & 0x80)
|
if (Rm & 0x80)
|
||||||
Rm |= 0xffffff00;
|
Rm |= 0xffffff00;
|
||||||
|
|
||||||
@ -6053,7 +6053,7 @@ L_stm_s_takeabort:
|
|||||||
state->Reg[BITS(12, 15)] = Rm;
|
state->Reg[BITS(12, 15)] = Rm;
|
||||||
else
|
else
|
||||||
/* SXTAB */
|
/* SXTAB */
|
||||||
state->Reg[BITS(12, 15)] += Rm;
|
state->Reg[BITS(12, 15)] = state->Reg[BITS(16, 19)] + Rm;
|
||||||
|
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user