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fixup! JitX64: Add const to relevant member functions, add initialisers to members of CondManager

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This commit is contained in:
MerryMage 2016-04-06 20:03:36 +01:00
parent eb03919c36
commit b3a257fd8f
2 changed files with 28 additions and 28 deletions
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24
src/core/arm/jit_x64/jit_x64.cpp
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@ -181,81 +181,81 @@ void JitX64::CompileCallHost(const void* const fn) {
// We static_assert types because anything that calls these functions makes those assumptions. // We static_assert types because anything that calls these functions makes those assumptions.
// If the types of the variables are changed please update all code that calls these functions. // If the types of the variables are changed please update all code that calls these functions.
Gen::OpArg JitX64::MJitStateCycleCount() { Gen::OpArg JitX64::MJitStateCycleCount() const {
static_assert(std::is_same<decltype(JitState::cycles_remaining), s32>::value, "JitState::cycles_remaining must be s32"); static_assert(std::is_same<decltype(JitState::cycles_remaining), s32>::value, "JitState::cycles_remaining must be s32");
return Gen::MDisp(reg_alloc.JitStateReg(), offsetof(JitState, cycles_remaining)); return Gen::MDisp(reg_alloc.JitStateReg(), offsetof(JitState, cycles_remaining));
} }
Gen::OpArg JitX64::MJitStateArmPC() { Gen::OpArg JitX64::MJitStateArmPC() const {
static_assert(std::is_same<decltype(JitState::cpu_state), ARMul_State>::value, "JitState::cpu_state must be ARMul_State"); static_assert(std::is_same<decltype(JitState::cpu_state), ARMul_State>::value, "JitState::cpu_state must be ARMul_State");
static_assert(std::is_same<decltype(ARMul_State::Reg), std::array<u32, 16>>::value, "ARMul_State::Reg must be std::array<u32, 16>"); static_assert(std::is_same<decltype(ARMul_State::Reg), std::array<u32, 16>>::value, "ARMul_State::Reg must be std::array<u32, 16>");
return Gen::MDisp(reg_alloc.JitStateReg(), offsetof(JitState, cpu_state) + offsetof(ARMul_State, Reg) + 15 * sizeof(u32)); return Gen::MDisp(reg_alloc.JitStateReg(), offsetof(JitState, cpu_state) + offsetof(ARMul_State, Reg) + 15 * sizeof(u32));
} }
Gen::OpArg JitX64::MJitStateTFlag() { Gen::OpArg JitX64::MJitStateTFlag() const {
static_assert(std::is_same<decltype(JitState::cpu_state), ARMul_State>::value, "JitState::cpu_state must be ARMul_State"); static_assert(std::is_same<decltype(JitState::cpu_state), ARMul_State>::value, "JitState::cpu_state must be ARMul_State");
static_assert(std::is_same<decltype(ARMul_State::TFlag), u32>::value, "TFlag must be u32"); static_assert(std::is_same<decltype(ARMul_State::TFlag), u32>::value, "TFlag must be u32");
return Gen::MDisp(reg_alloc.JitStateReg(), offsetof(JitState, cpu_state) + offsetof(ARMul_State, TFlag)); return Gen::MDisp(reg_alloc.JitStateReg(), offsetof(JitState, cpu_state) + offsetof(ARMul_State, TFlag));
} }
Gen::OpArg JitX64::MJitStateHostReturnRIP() { Gen::OpArg JitX64::MJitStateHostReturnRIP() const {
static_assert(std::is_same<decltype(JitState::return_RIP), u64>::value, "JitState::return_RIP must be u64"); static_assert(std::is_same<decltype(JitState::return_RIP), u64>::value, "JitState::return_RIP must be u64");
return Gen::MDisp(reg_alloc.JitStateReg(), offsetof(JitState, return_RIP)); return Gen::MDisp(reg_alloc.JitStateReg(), offsetof(JitState, return_RIP));
} }
Gen::OpArg JitX64::MJitStateHostReturnRSP() { Gen::OpArg JitX64::MJitStateHostReturnRSP() const {
static_assert(std::is_same<decltype(JitState::save_host_RSP), u64>::value, "JitState::save_host_RSP must be u64"); static_assert(std::is_same<decltype(JitState::save_host_RSP), u64>::value, "JitState::save_host_RSP must be u64");
return Gen::MDisp(reg_alloc.JitStateReg(), offsetof(JitState, save_host_RSP)); return Gen::MDisp(reg_alloc.JitStateReg(), offsetof(JitState, save_host_RSP));
} }
Gen::OpArg JitX64::MJitStateZFlag() { Gen::OpArg JitX64::MJitStateZFlag() const {
static_assert(std::is_same<decltype(JitState::cpu_state), ARMul_State>::value, "JitState::cpu_state must be ARMul_State"); static_assert(std::is_same<decltype(JitState::cpu_state), ARMul_State>::value, "JitState::cpu_state must be ARMul_State");
static_assert(std::is_same<decltype(ARMul_State::ZFlag), u32>::value, "ZFlag must be u32"); static_assert(std::is_same<decltype(ARMul_State::ZFlag), u32>::value, "ZFlag must be u32");
return Gen::MDisp(reg_alloc.JitStateReg(), offsetof(JitState, cpu_state) + offsetof(ARMul_State, ZFlag)); return Gen::MDisp(reg_alloc.JitStateReg(), offsetof(JitState, cpu_state) + offsetof(ARMul_State, ZFlag));
} }
Gen::OpArg JitX64::MJitStateCFlag() { Gen::OpArg JitX64::MJitStateCFlag() const {
static_assert(std::is_same<decltype(JitState::cpu_state), ARMul_State>::value, "JitState::cpu_state must be ARMul_State"); static_assert(std::is_same<decltype(JitState::cpu_state), ARMul_State>::value, "JitState::cpu_state must be ARMul_State");
static_assert(std::is_same<decltype(ARMul_State::CFlag), u32>::value, "CFlag must be u32"); static_assert(std::is_same<decltype(ARMul_State::CFlag), u32>::value, "CFlag must be u32");
return Gen::MDisp(reg_alloc.JitStateReg(), offsetof(JitState, cpu_state) + offsetof(ARMul_State, CFlag)); return Gen::MDisp(reg_alloc.JitStateReg(), offsetof(JitState, cpu_state) + offsetof(ARMul_State, CFlag));
} }
Gen::OpArg JitX64::MJitStateNFlag() { Gen::OpArg JitX64::MJitStateNFlag() const {
static_assert(std::is_same<decltype(JitState::cpu_state), ARMul_State>::value, "JitState::cpu_state must be ARMul_State"); static_assert(std::is_same<decltype(JitState::cpu_state), ARMul_State>::value, "JitState::cpu_state must be ARMul_State");
static_assert(std::is_same<decltype(ARMul_State::NFlag), u32>::value, "NFlag must be u32"); static_assert(std::is_same<decltype(ARMul_State::NFlag), u32>::value, "NFlag must be u32");
return Gen::MDisp(reg_alloc.JitStateReg(), offsetof(JitState, cpu_state) + offsetof(ARMul_State, NFlag)); return Gen::MDisp(reg_alloc.JitStateReg(), offsetof(JitState, cpu_state) + offsetof(ARMul_State, NFlag));
} }
Gen::OpArg JitX64::MJitStateVFlag() { Gen::OpArg JitX64::MJitStateVFlag() const {
static_assert(std::is_same<decltype(JitState::cpu_state), ARMul_State>::value, "JitState::cpu_state must be ARMul_State"); static_assert(std::is_same<decltype(JitState::cpu_state), ARMul_State>::value, "JitState::cpu_state must be ARMul_State");
static_assert(std::is_same<decltype(ARMul_State::VFlag), u32>::value, "VFlag must be u32"); static_assert(std::is_same<decltype(ARMul_State::VFlag), u32>::value, "VFlag must be u32");
return Gen::MDisp(reg_alloc.JitStateReg(), offsetof(JitState, cpu_state) + offsetof(ARMul_State, VFlag)); return Gen::MDisp(reg_alloc.JitStateReg(), offsetof(JitState, cpu_state) + offsetof(ARMul_State, VFlag));
} }
Gen::OpArg JitX64::MJitStateCpsr() { Gen::OpArg JitX64::MJitStateCpsr() const {
static_assert(std::is_same<decltype(JitState::cpu_state), ARMul_State>::value, "JitState::cpu_state must be ARMul_State"); static_assert(std::is_same<decltype(JitState::cpu_state), ARMul_State>::value, "JitState::cpu_state must be ARMul_State");
static_assert(std::is_same<decltype(ARMul_State::Cpsr), u32>::value, "Cpsr must be u32"); static_assert(std::is_same<decltype(ARMul_State::Cpsr), u32>::value, "Cpsr must be u32");
return Gen::MDisp(reg_alloc.JitStateReg(), offsetof(JitState, cpu_state) + offsetof(ARMul_State, Cpsr)); return Gen::MDisp(reg_alloc.JitStateReg(), offsetof(JitState, cpu_state) + offsetof(ARMul_State, Cpsr));
} }
Gen::OpArg JitX64::MJitStateExclusiveTag() { Gen::OpArg JitX64::MJitStateExclusiveTag() const {
static_assert(std::is_same<decltype(JitState::cpu_state), ARMul_State>::value, "JitState::cpu_state must be ARMul_State"); static_assert(std::is_same<decltype(JitState::cpu_state), ARMul_State>::value, "JitState::cpu_state must be ARMul_State");
static_assert(std::is_same<decltype(ARMul_State::exclusive_tag), u32>::value, "exclusive_tag must be u32"); static_assert(std::is_same<decltype(ARMul_State::exclusive_tag), u32>::value, "exclusive_tag must be u32");
return Gen::MDisp(reg_alloc.JitStateReg(), offsetof(JitState, cpu_state) + offsetof(ARMul_State, exclusive_tag)); return Gen::MDisp(reg_alloc.JitStateReg(), offsetof(JitState, cpu_state) + offsetof(ARMul_State, exclusive_tag));
} }
Gen::OpArg JitX64::MJitStateExclusiveState() { Gen::OpArg JitX64::MJitStateExclusiveState() const {
static_assert(std::is_same<decltype(JitState::cpu_state), ARMul_State>::value, "JitState::cpu_state must be ARMul_State"); static_assert(std::is_same<decltype(JitState::cpu_state), ARMul_State>::value, "JitState::cpu_state must be ARMul_State");
static_assert(std::is_same<decltype(ARMul_State::exclusive_state), bool>::value, "exclusive_state must be bool"); static_assert(std::is_same<decltype(ARMul_State::exclusive_state), bool>::value, "exclusive_state must be bool");

32
src/core/arm/jit_x64/jit_x64.h
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@ -82,18 +82,18 @@ private:
private: private:
/// Convenience functions /// Convenience functions
Gen::OpArg MJitStateCycleCount(); Gen::OpArg MJitStateCycleCount() const;
Gen::OpArg MJitStateArmPC(); Gen::OpArg MJitStateArmPC() const;
Gen::OpArg MJitStateTFlag(); Gen::OpArg MJitStateTFlag() const;
Gen::OpArg MJitStateHostReturnRIP(); Gen::OpArg MJitStateHostReturnRIP() const;
Gen::OpArg MJitStateHostReturnRSP(); Gen::OpArg MJitStateHostReturnRSP() const;
Gen::OpArg MJitStateZFlag(); Gen::OpArg MJitStateZFlag() const;
Gen::OpArg MJitStateCFlag(); Gen::OpArg MJitStateCFlag() const;
Gen::OpArg MJitStateNFlag(); Gen::OpArg MJitStateNFlag() const;
Gen::OpArg MJitStateVFlag(); Gen::OpArg MJitStateVFlag() const;
Gen::OpArg MJitStateCpsr(); Gen::OpArg MJitStateCpsr() const;
Gen::OpArg MJitStateExclusiveTag(); Gen::OpArg MJitStateExclusiveTag() const;
Gen::OpArg MJitStateExclusiveState(); Gen::OpArg MJitStateExclusiveState() const;
u32 GetReg15Value() const { u32 GetReg15Value() const {
return (current.arm_pc & ~0x1) + static_cast<u32>(GetInstSize() * 2); return (current.arm_pc & ~0x1) + static_cast<u32>(GetInstSize() * 2);
@ -131,10 +131,10 @@ private:
private: private:
struct CondManager { struct CondManager {
private: private:
JitX64* jit; JitX64* jit = nullptr;
Cond current_cond; Cond current_cond = Cond::AL;
bool flags_dirty; bool flags_dirty = true;
Gen::FixupBranch current_cond_fixup; Gen::FixupBranch current_cond_fixup = {};
public: public:
void Init(JitX64* jit_); void Init(JitX64* jit_);
void CompileCond(Cond cond); void CompileCond(Cond cond);