Formatting

src/binary_translation/ARMFuncs.cpp

@@ -18,18 +18,6 @@ ARMFuncs::ShiftTN ARMFuncs::DecodeImmShift(InstructionBlock* instruction, u32 ty
     }
 }
 
-ARMFuncs::SRType ARMFuncs::DecodeRegShift(u32 type)
-{
-    switch (type)
-    {
-    case 0: return SRType::LSL;
-    case 1: return SRType::LSR;
-    case 2: return SRType::ASR;
-    case 3: return SRType::ROR;
-    default: assert(false, "Invalid shift type");
-    }
-}
-
 llvm::Value* ARMFuncs::Shift(InstructionBlock* instruction, llvm::Value* value, SRType type, llvm::Value* amount, llvm::Value* carry_in)
 {
     return Shift_C(instruction, value, type, amount, carry_in).result;

src/binary_translation/ARMFuncs.h

@@ -33,7 +33,6 @@ public:
     };
 
     static ShiftTN DecodeImmShift(InstructionBlock *instruction, u32 type, u32 imm5);
-    static SRType DecodeRegShift(u32 type);
 
     static llvm::Value *Shift(InstructionBlock *instruction, llvm::Value *value, SRType type, llvm::Value *amount, llvm::Value *carry_in);
     static ResultCarry Shift_C(InstructionBlock *instruction, llvm::Value *value, SRType type, llvm::Value *amount, llvm::Value *carry_in);

src/binary_translation/BinarySearch.h

@@ -11,8 +11,8 @@ struct BinarySearch
     size_t max;
     BinarySearch(size_t max) : min(0), mid(max / 2), max(max) { }
     BinarySearch(size_t min, size_t max) : min(min), mid((min + max) / 2), max(max) { }
-    BinarySearch l() { return BinarySearch(min, mid); }
-    BinarySearch r() { return BinarySearch(mid, max); }
+    BinarySearch l() const { return BinarySearch(min, mid); }
+    BinarySearch r() const { return BinarySearch(mid, max); }
     operator size_t()
     {
         LOG_DEBUG(BinaryTranslator, "BinarySearch: %x: %x - %x (%x, %d)", mid, max, min, max - min, (size_t)std::log2(max - min));

src/binary_translation/BlockColors.h

@@ -27,8 +27,8 @@ public:
 	void GenerateFunctions();
 
 	llvm::FunctionType *GetFunctionType() { return function_type; }
-	size_t GetColorCount() { return colors.size(); }
-	size_t GetColorInstructionCount(size_t color) { return colors[color].instructions.size(); }
+	size_t GetColorCount() const { return colors.size(); }
+    size_t GetColorInstructionCount(size_t color) const { return colors[color].instructions.size(); }
 	InstructionBlock *GetColorInstruction(size_t color, size_t index) { return colors[color].instructions[index]; }
 	llvm::Function *GetColorFunction(size_t color) { return colors[color].function; }
 private:

src/binary_translation/CodeGen.cpp

@@ -37,14 +37,14 @@ void CodeGen::Run()
         return;
 	}
 
-    IntializeLLVM();
+    InitializeLLVM();
     GenerateModule();
     GenerateDebugFiles();
     if (!Verify()) return;
     OptimizeAndGenerate();
 }
 
-void CodeGen::IntializeLLVM()
+void CodeGen::InitializeLLVM()
 {
     InitializeNativeTarget();
     InitializeNativeTargetAsmPrinter();

src/binary_translation/CodeGen.h

@@ -19,7 +19,7 @@ public:
 	~CodeGen();
 
     void Run();
-    void IntializeLLVM();
+    void InitializeLLVM();
     void GenerateModule();
     void GenerateDebugFiles();
     bool Verify();

src/binary_translation/InstructionBlock.cpp

@@ -54,7 +54,7 @@ void InstructionBlock::Link(InstructionBlock* prev, InstructionBlock* next)
 	next->prevs.push_back(prev);
 }
 
-u32 InstructionBlock::Address()
+u32 InstructionBlock::Address() const
 {
     return instruction->Address();
 }

src/binary_translation/InstructionBlock.h

@@ -54,18 +54,18 @@ public:
 	 */
 	static void Link(InstructionBlock *prev, InstructionBlock *next);
 
-    u32 Address();
+    u32 Address() const;
     ModuleGen *Module() { return module; }
     llvm::IRBuilder<> *IrBuilder() { return module->IrBuilder(); }
 
     llvm::BasicBlock *GetEntryBasicBlock() { return entry_basic_block; }
 
-	bool HasColor() { return has_color; }
+	bool HasColor() const { return has_color; }
 	void SetColor(size_t color) { this->color = color; has_color = true; }
-	size_t GetColor() { return color; }
+    size_t GetColor() const { return color; }
 
-	std::list<InstructionBlock *> GetNexts() { return nexts; }
-	std::list<InstructionBlock *> GetPrevs() { return prevs; }
+	std::list<InstructionBlock *> GetNexts() const { return nexts; }
+    std::list<InstructionBlock *> GetPrevs() const { return prevs; }
 private:
     // Textual representation of the address
     // Used to generate names

src/binary_translation/Instructions/Arithmetic.cpp

@@ -27,32 +27,28 @@ bool IsSupported(Arithmetic::Op op)
 
 bool IsBitwise(Arithmetic::Op op)
 {
-    switch (op)
-    {
-    case Arithmetic::Op::BitwiseAnd: return true;
-    case Arithmetic::Op::BitwiseXor: return true;
-    case Arithmetic::Op::BitwiseOr: return true;
-    case Arithmetic::Op::BitwiseBitClear: return true;
-    default: break;
-    }
+    return op == Arithmetic::Op::BitwiseAnd ||
+           op == Arithmetic::Op::BitwiseXor ||
+           op == Arithmetic::Op::BitwiseOr ||
+           op == Arithmetic::Op::BitwiseBitClear;
 }
 
 bool Arithmetic::Decode()
 {
-    if (ReadFields({ CondDef(), FieldDef<3>(0), FieldDef<4>(&op), FieldDef<1>(&s), FieldDef<4>(&rn),
+    if (ReadFields({ CondDef(), FieldDef<3>(0), FieldDef<4>(&op), FieldDef<1>(&set_flags), FieldDef<4>(&rn),
                      FieldDef<4>(&rd), FieldDef<5>(&imm5), FieldDef<2>(&type), FieldDef<1>(0), FieldDef<4>(&rm)}))
     {
         form = Form::Register;
-        if (rd == Register::PC && s) return false; // SEE SUBS PC, LR and related instructions;
+        if (rd == Register::PC && set_flags) return false; // SEE SUBS PC, LR and related instructions;
         if (rn == Register::PC) return false;
         if (rm == Register::PC) return false;
         return IsSupported(op);
     }
-    if (ReadFields({ CondDef(), FieldDef<3>(1), FieldDef<4>(&op), FieldDef<1>(&s), FieldDef<4>(&rn),
+    if (ReadFields({ CondDef(), FieldDef<3>(1), FieldDef<4>(&op), FieldDef<1>(&set_flags), FieldDef<4>(&rn),
         FieldDef<4>(&rd), FieldDef<12>(&imm12) }))
     {
         form = Form::Immediate;
-        if (rd == Register::PC && s) return false; // SEE SUBS PC, LR and related instructions;
+        if (rd == Register::PC && set_flags) return false; // SEE SUBS PC, LR and related instructions;
         if (rn == Register::PC) return false;
         return IsSupported(op);
     }
@@ -117,7 +113,7 @@ void Arithmetic::GenerateInstructionCode(InstructionBlock* instruction_block)
 
     instruction_block->Write(rd, result.result);
 
-    if (s)
+    if (set_flags)
     {
         instruction_block->Write(Register::N, ir_builder->CreateICmpSLT(result.result, ir_builder->getInt32(0)));
         instruction_block->Write(Register::Z, ir_builder->CreateICmpEQ(result.result, ir_builder->getInt32(0)));

src/binary_translation/Instructions/Arithmetic.h

@@ -20,13 +20,12 @@ public:
         BitwiseOr = 12, MoveAndShifts, BitwiseBitClear, BitwiseNot
     };
 
-public:
-    virtual bool Decode() override;
+    bool Decode() override;
     void GenerateInstructionCode(InstructionBlock* instruction_block) override;
 private:
     Form form;
     Op op;
-    bool s;
+    bool set_flags;
     Register rn;
     Register rd;
     u32 imm5;

src/binary_translation/Instructions/Branch.h

@@ -9,8 +9,7 @@ public:
         Immediate, Register
     };
 
-public:
-    virtual bool Decode() override;
+    bool Decode() override;
     void GenerateInstructionCode(InstructionBlock* instruction_block) override;
 private:
     Form form;

src/binary_translation/Instructions/Instruction.h

@@ -24,7 +24,7 @@ public:
      */
     void GenerateCode(InstructionBlock *instruction_block);
 
-    u32 Address() { return address; }
+    u32 Address() const { return address; }
 protected:
     /*
      * Derived classes must override this, and implement it by calling ReadFields

src/binary_translation/Instructions/Ldr.h

@@ -10,8 +10,7 @@ public:
         PC, Reg, MultiReg
     };
 
-public:
-    virtual bool Decode() override;
+    bool Decode() override;
     void GenerateInstructionCode(InstructionBlock* instruction_block) override;
 
 private:

src/binary_translation/Instructions/MovShift.h

@@ -18,8 +18,7 @@ public:
         Register, ImmediateA1, ImmediateA2
     };
 
-public:
-    virtual bool Decode() override;
+    bool Decode() override;
     void GenerateInstructionCode(InstructionBlock* instruction_block) override;
 private:
     Form form;

src/binary_translation/Instructions/Str.h

@@ -10,8 +10,7 @@ public:
         Immediate, Reg, MultiReg
     };
 
-public:
-    virtual bool Decode() override;
+    bool Decode() override;
     void GenerateInstructionCode(InstructionBlock* instruction_block) override;
 
 private:

src/binary_translation/MachineState.h

@@ -1,3 +1,4 @@
+#pragma once
 
 enum class Condition;
 enum class Register;

src/core/loader/loader.cpp

@@ -28,10 +28,10 @@ const std::initializer_list<Kernel::AddressMapping> default_address_mappings = {
     { 0x1FF70000,   0x8000, true  }, // part of DSP RAM
     { 0x1F000000, 0x600000, false }, // entire VRAM
 };
-u32 ROMCodeStart = 0;
-u32 ROMCodeSize = 0;
-u32 ROMReadOnlyDataStart = 0;
-u32 ROMReadOnlyDataSize = 0;
+u32 ROMCodeStart;
+u32 ROMCodeSize;
+u32 ROMReadOnlyDataStart;
+u32 ROMReadOnlyDataSize;
 
 /**
  * Identifies the type of a bootable file
@@ -97,6 +97,11 @@ static const char* GetFileTypeString(FileType type) {
 }
 
 ResultStatus LoadFile(const std::string& filename) {
+    ROMCodeStart = 0;
+    ROMCodeSize = 0;
+    ROMReadOnlyDataStart = 0;
+    ROMReadOnlyDataSize = 0;
+
     std::unique_ptr<FileUtil::IOFile> file(new FileUtil::IOFile(filename, "rb"));
     if (!file->IsOpen()) {
         LOG_ERROR(Loader, "Failed to load file %s", filename.c_str());