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Add WriteHWRegRepeat
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@ -167,6 +167,29 @@ static void WriteHWRegsWithMask(Service::Interface* self) {
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WriteHWRegsWithMask(reg_addr, size, src_data, mask_data);
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WriteHWRegsWithMask(reg_addr, size, src_data, mask_data);
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}
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}
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static void WriteHWRegRepeat(Service::Interface* self) {
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u32* cmd_buff = Kernel::GetCommandBuffer();
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u32 reg_addr = cmd_buff[1];
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u32 size = cmd_buff[2];
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// TODO: Return proper error codes
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if (reg_addr + size >= 0x420000) {
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LOG_ERROR(Service_GSP, "Write address out of range! (address=0x%08x, size=0x%08x)", reg_addr, size);
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return;
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}
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//Taking size to mean amount of times the reg is hammered.
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/*// size should be word-aligned
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if ((size % 4) != 0) {
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LOG_ERROR(Service_GSP, "Invalid size 0x%08x", size);
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return;
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}*/
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u32 data = cmd_buff[4];
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for(int i = 0;i<size;i++) GPU::Write<u32>(reg_addr,data);
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}
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/// Read a GSP GPU hardware register
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/// Read a GSP GPU hardware register
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static void ReadHWRegs(Service::Interface* self) {
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static void ReadHWRegs(Service::Interface* self) {
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u32* cmd_buff = Kernel::GetCommandBuffer();
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u32* cmd_buff = Kernel::GetCommandBuffer();
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@ -452,7 +475,7 @@ static void TriggerCmdReqQueue(Service::Interface* self) {
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const Interface::FunctionInfo FunctionTable[] = {
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const Interface::FunctionInfo FunctionTable[] = {
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{0x00010082, WriteHWRegs, "WriteHWRegs"},
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{0x00010082, WriteHWRegs, "WriteHWRegs"},
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{0x00020084, WriteHWRegsWithMask, "WriteHWRegsWithMask"},
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{0x00020084, WriteHWRegsWithMask, "WriteHWRegsWithMask"},
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{0x00030082, nullptr, "WriteHWRegRepeat"},
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{0x00030082, WriteHWRegRepeat, "WriteHWRegRepeat"},
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{0x00040080, ReadHWRegs, "ReadHWRegs"},
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{0x00040080, ReadHWRegs, "ReadHWRegs"},
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{0x00050200, SetBufferSwap, "SetBufferSwap"},
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{0x00050200, SetBufferSwap, "SetBufferSwap"},
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{0x00060082, nullptr, "SetCommandList"},
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{0x00060082, nullptr, "SetCommandList"},
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