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https://github.com/citra-emu/citra.git
synced 2024-12-18 18:30:05 +00:00
Fixed as per PR feedback.
This commit is contained in:
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bd658a8801
commit
a6ecb3c913
@ -7,7 +7,7 @@
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#include "common/swap.h"
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#include "common/swap.h"
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#include "core/arm/skyeye_common/armstate.h"
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#include "core/arm/skyeye_common/armstate.h"
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#include "core/arm/skyeye_common/vfp/vfp.h"
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#include "core/arm/skyeye_common/vfp/vfp.h"
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#include "core/gdbstub/gdbstub.h"
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#include "core/core.h"
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#include "core/memory.h"
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#include "core/memory.h"
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ARMul_State::ARMul_State(PrivilegeMode initial_mode) {
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ARMul_State::ARMul_State(PrivilegeMode initial_mode) {
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@ -595,3 +595,18 @@ void ARMul_State::WriteCP15Register(u32 value, u32 crn, u32 opcode_1, u32 crm, u
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CP15[CP15_THREAD_UPRW] = value;
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CP15[CP15_THREAD_UPRW] = value;
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}
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}
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}
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}
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void ARMul_State::ServeBreak() {
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if (GDBStub::IsServerEnabled()) {
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if (last_bkpt_hit) {
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Reg[15] = last_bkpt.address;
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}
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Kernel::Thread* thread = Kernel::GetCurrentThread();
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Core::CPU().SaveContext(thread->context);
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if (last_bkpt_hit || GDBStub::GetCpuStepFlag()) {
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last_bkpt_hit = false;
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GDBStub::Break();
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GDBStub::SendTrap(thread, 5);
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}
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}
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}
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@ -21,7 +21,6 @@
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#include <unordered_map>
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#include <unordered_map>
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#include "common/common_types.h"
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#include "common/common_types.h"
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#include "core/arm/skyeye_common/arm_regformat.h"
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#include "core/arm/skyeye_common/arm_regformat.h"
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#include "core/core.h"
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#include "core/gdbstub/gdbstub.h"
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#include "core/gdbstub/gdbstub.h"
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// Signal levels
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// Signal levels
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@ -196,20 +195,7 @@ public:
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last_bkpt_hit = true;
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last_bkpt_hit = true;
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}
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}
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void ServeBreak() {
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void ServeBreak();
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if (GDBStub::IsServerEnabled()) {
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if (last_bkpt_hit) {
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Reg[15] = last_bkpt.address;
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}
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Kernel::Thread* thread = Kernel::GetCurrentThread();
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Core::CPU().SaveContext(thread->context);
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if (last_bkpt_hit || GDBStub::GetCpuStepFlag()) {
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last_bkpt_hit = false;
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GDBStub::Break();
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GDBStub::SendTrap(thread, 5);
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}
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}
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}
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std::array<u32, 16> Reg{}; // The current register file
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std::array<u32, 16> Reg{}; // The current register file
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std::array<u32, 2> Reg_usr{};
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std::array<u32, 2> Reg_usr{};
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@ -128,7 +128,7 @@ static u32 command_length;
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static u32 latest_signal = 0;
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static u32 latest_signal = 0;
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static bool memory_break = false;
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static bool memory_break = false;
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Kernel::Thread* current_thread = nullptr;
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static Kernel::Thread* current_thread = nullptr;
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// Binding to a port within the reserved ports range (0-1023) requires root permissions,
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// Binding to a port within the reserved ports range (0-1023) requires root permissions,
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// so default to a port outside of that range.
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// so default to a port outside of that range.
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@ -173,9 +173,9 @@ static u32 RegRead(std::size_t id, Kernel::Thread* thread = nullptr) {
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}
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}
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if (id <= PC_REGISTER) {
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if (id <= PC_REGISTER) {
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return thread->context.get()->GetCpuRegister(id);
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return thread->context->GetCpuRegister(id);
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} else if (id == CPSR_REGISTER) {
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} else if (id == CPSR_REGISTER) {
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return thread->context.get()->GetCpsr();
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return thread->context->GetCpsr();
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} else {
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} else {
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return 0;
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return 0;
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}
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}
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@ -187,9 +187,9 @@ static void RegWrite(std::size_t id, u32 val, Kernel::Thread* thread = nullptr)
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}
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}
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if (id <= PC_REGISTER) {
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if (id <= PC_REGISTER) {
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return thread->context.get()->SetCpuRegister(id, val);
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return thread->context->SetCpuRegister(id, val);
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} else if (id == CPSR_REGISTER) {
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} else if (id == CPSR_REGISTER) {
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return thread->context.get()->SetCpsr(val);
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return thread->context->SetCpsr(val);
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}
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}
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}
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}
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@ -199,12 +199,11 @@ static u64 FpuRead(std::size_t id, Kernel::Thread* thread = nullptr) {
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}
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}
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if (id >= D0_REGISTER && id < FPSCR_REGISTER) {
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if (id >= D0_REGISTER && id < FPSCR_REGISTER) {
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u64 ret = thread->context.get()->GetFpuRegister(2 * (id - D0_REGISTER));
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u64 ret = thread->context->GetFpuRegister(2 * (id - D0_REGISTER));
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ret |= static_cast<u64>(thread->context.get()->GetFpuRegister(2 * (id - D0_REGISTER) + 1))
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ret |= static_cast<u64>(thread->context->GetFpuRegister(2 * (id - D0_REGISTER) + 1)) << 32;
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<< 32;
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return ret;
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return ret;
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} else if (id == FPSCR_REGISTER) {
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} else if (id == FPSCR_REGISTER) {
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return thread->context.get()->GetFpscr();
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return thread->context->GetFpscr();
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} else {
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} else {
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return 0;
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return 0;
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}
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}
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@ -216,10 +215,10 @@ static void FpuWrite(std::size_t id, u64 val, Kernel::Thread* thread = nullptr)
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}
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}
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if (id >= D0_REGISTER && id < FPSCR_REGISTER) {
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if (id >= D0_REGISTER && id < FPSCR_REGISTER) {
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thread->context.get()->SetFpuRegister(2 * (id - D0_REGISTER), (u32)val);
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thread->context->SetFpuRegister(2 * (id - D0_REGISTER), (u32)val);
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thread->context.get()->SetFpuRegister(2 * (id - D0_REGISTER) + 1, val >> 32);
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thread->context->SetFpuRegister(2 * (id - D0_REGISTER) + 1, val >> 32);
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} else if (id == FPSCR_REGISTER) {
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} else if (id == FPSCR_REGISTER) {
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return thread->context.get()->SetFpscr(static_cast<u32>(val));
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return thread->context->SetFpscr(static_cast<u32>(val));
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}
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}
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}
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}
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@ -531,8 +530,7 @@ static void HandleQuery() {
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std::string val = "m";
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std::string val = "m";
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const auto& threads = Kernel::GetThreadList();
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const auto& threads = Kernel::GetThreadList();
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for (const auto& thread : threads) {
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for (const auto& thread : threads) {
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val += fmt::format("{:x}", thread->GetThreadId());
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val += fmt::format("{:x},", thread->GetThreadId());
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val += ",";
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}
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}
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val.pop_back();
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val.pop_back();
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SendReply(val.c_str());
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SendReply(val.c_str());
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@ -1214,13 +1212,15 @@ void SetCpuStepFlag(bool is_step) {
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}
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}
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void SendTrap(Kernel::Thread* thread, int trap) {
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void SendTrap(Kernel::Thread* thread, int trap) {
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if (send_trap) {
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if (!send_trap) {
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if (!halt_loop || current_thread == thread) {
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return;
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current_thread = thread;
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SendSignal(thread, trap);
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}
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halt_loop = true;
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send_trap = false;
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}
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}
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if (!halt_loop || current_thread == thread) {
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current_thread = thread;
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SendSignal(thread, trap);
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}
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halt_loop = true;
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send_trap = false;
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}
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}
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}; // namespace GDBStub
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}; // namespace GDBStub
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