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https://github.com/citra-emu/citra.git
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Add stub for ConvertProcessFromDspDram
Should theoretically push retail stuff further along
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parent
d5be332d21
commit
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@ -15,6 +15,25 @@ namespace DSP_DSP {
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static Handle semaphore_event;
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static Handle semaphore_event;
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static Handle interrupt_event;
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static Handle interrupt_event;
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/**
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* DSP_DSP::ConvertProcessAddressFromDspDram service function
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* Inputs:
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* 1 : Address
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* Outputs:
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* 1 : Result of function, 0 on success, otherwise error code
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* 2 : (inaddr << 1) + 0x1FF40000 (where 0x1FF00000 is the DSP RAM address)
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*/
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void ConvertProcessAddressFromDspDram(Service::Interface* self) {
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u32* cmd_buff = Service::GetCommandBuffer();
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u32 addr = cmd_buff[1];
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cmd_buff[1] = 0; // No error
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cmd_buff[2] = (addr << 1) + (Memory::DSP_MEMORY_VADDR + 0x40000);
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DEBUG_LOG(KERNEL, "(STUBBED) called with address %u", addr);
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}
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/**
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/**
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* DSP_DSP::LoadComponent service function
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* DSP_DSP::LoadComponent service function
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* Inputs:
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* Inputs:
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@ -90,31 +109,31 @@ void WriteReg0x10(Service::Interface* self) {
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}
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}
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const Interface::FunctionInfo FunctionTable[] = {
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const Interface::FunctionInfo FunctionTable[] = {
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{0x00010040, nullptr, "RecvData"},
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{0x00010040, nullptr, "RecvData"},
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{0x00020040, nullptr, "RecvDataIsReady"},
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{0x00020040, nullptr, "RecvDataIsReady"},
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{0x00030080, nullptr, "SendData"},
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{0x00030080, nullptr, "SendData"},
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{0x00040040, nullptr, "SendDataIsEmpty"},
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{0x00040040, nullptr, "SendDataIsEmpty"},
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{0x00070040, WriteReg0x10, "WriteReg0x10"},
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{0x00070040, WriteReg0x10, "WriteReg0x10"},
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{0x00080000, nullptr, "GetSemaphore"},
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{0x00080000, nullptr, "GetSemaphore"},
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{0x00090040, nullptr, "ClearSemaphore"},
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{0x00090040, nullptr, "ClearSemaphore"},
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{0x000B0000, nullptr, "CheckSemaphoreRequest"},
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{0x000B0000, nullptr, "CheckSemaphoreRequest"},
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{0x000C0040, nullptr, "ConvertProcessAddressFromDspDram"},
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{0x000C0040, ConvertProcessAddressFromDspDram, "ConvertProcessAddressFromDspDram"},
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{0x000D0082, nullptr, "WriteProcessPipe"},
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{0x000D0082, nullptr, "WriteProcessPipe"},
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{0x001000C0, nullptr, "ReadPipeIfPossible"},
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{0x001000C0, nullptr, "ReadPipeIfPossible"},
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{0x001100C2, LoadComponent, "LoadComponent"},
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{0x001100C2, LoadComponent, "LoadComponent"},
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{0x00120000, nullptr, "UnloadComponent"},
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{0x00120000, nullptr, "UnloadComponent"},
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{0x00130082, nullptr, "FlushDataCache"},
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{0x00130082, nullptr, "FlushDataCache"},
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{0x00140082, nullptr, "InvalidateDCache"},
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{0x00140082, nullptr, "InvalidateDCache"},
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{0x00150082, RegisterInterruptEvents, "RegisterInterruptEvents"},
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{0x00150082, RegisterInterruptEvents, "RegisterInterruptEvents"},
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{0x00160000, GetSemaphoreEventHandle, "GetSemaphoreEventHandle"},
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{0x00160000, GetSemaphoreEventHandle, "GetSemaphoreEventHandle"},
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{0x00170040, nullptr, "SetSemaphoreMask"},
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{0x00170040, nullptr, "SetSemaphoreMask"},
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{0x00180040, nullptr, "GetPhysicalAddress"},
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{0x00180040, nullptr, "GetPhysicalAddress"},
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{0x00190040, nullptr, "GetVirtualAddress"},
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{0x00190040, nullptr, "GetVirtualAddress"},
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{0x001A0042, nullptr, "SetIirFilterI2S1_cmd1"},
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{0x001A0042, nullptr, "SetIirFilterI2S1_cmd1"},
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{0x001B0042, nullptr, "SetIirFilterI2S1_cmd2"},
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{0x001B0042, nullptr, "SetIirFilterI2S1_cmd2"},
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{0x001C0082, nullptr, "SetIirFilterEQ"},
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{0x001C0082, nullptr, "SetIirFilterEQ"},
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{0x001F0000, nullptr, "GetHeadphoneStatus"},
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{0x001F0000, nullptr, "GetHeadphoneStatus"},
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{0x00210000, nullptr, "GetIsDspOccupied"},
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{0x00210000, nullptr, "GetIsDspOccupied"},
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};
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};
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////////////////////////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////////////////////////
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@ -19,7 +19,6 @@ typedef u32 PAddr; ///< Represents a pointer in the physical address space.
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enum {
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enum {
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BOOTROM_SIZE = 0x00010000, ///< Bootrom (super secret code/data @ 0x8000) size
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BOOTROM_SIZE = 0x00010000, ///< Bootrom (super secret code/data @ 0x8000) size
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MPCORE_PRIV_SIZE = 0x00002000, ///< MPCore private memory region size
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MPCORE_PRIV_SIZE = 0x00002000, ///< MPCore private memory region size
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DSP_SIZE = 0x00080000, ///< DSP memory size
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AXI_WRAM_SIZE = 0x00080000, ///< AXI WRAM size
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AXI_WRAM_SIZE = 0x00080000, ///< AXI WRAM size
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FCRAM_SIZE = 0x08000000, ///< FCRAM size
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FCRAM_SIZE = 0x08000000, ///< FCRAM size
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@ -34,6 +33,9 @@ enum {
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SHARED_MEMORY_VADDR_END = (SHARED_MEMORY_VADDR + SHARED_MEMORY_SIZE),
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SHARED_MEMORY_VADDR_END = (SHARED_MEMORY_VADDR + SHARED_MEMORY_SIZE),
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SHARED_MEMORY_MASK = (SHARED_MEMORY_SIZE - 1),
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SHARED_MEMORY_MASK = (SHARED_MEMORY_SIZE - 1),
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DSP_MEMORY_SIZE = 0x00080000, ///< DSP memory size
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DSP_MEMORY_VADDR = 0x1FF00000, ///< DSP memory virtual address
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CONFIG_MEMORY_SIZE = 0x00001000, ///< Configuration memory size
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CONFIG_MEMORY_SIZE = 0x00001000, ///< Configuration memory size
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CONFIG_MEMORY_VADDR = 0x1FF80000, ///< Configuration memory virtual address
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CONFIG_MEMORY_VADDR = 0x1FF80000, ///< Configuration memory virtual address
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CONFIG_MEMORY_VADDR_END = (CONFIG_MEMORY_VADDR + CONFIG_MEMORY_SIZE),
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CONFIG_MEMORY_VADDR_END = (CONFIG_MEMORY_VADDR + CONFIG_MEMORY_SIZE),
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