diff --git a/src/core/arm/jit_x64/common.h b/src/core/arm/jit_x64/common.h
index ed9a4250d..8a0a910a1 100644
--- a/src/core/arm/jit_x64/common.h
+++ b/src/core/arm/jit_x64/common.h
@@ -27,8 +27,6 @@ struct JitState {
 
     ARMul_State cpu_state;
 
-    void* bb;
-
     u64 save_host_RSP;
     u64 return_RIP;
 
diff --git a/src/core/arm/jit_x64/instructions/data_processing.cpp b/src/core/arm/jit_x64/instructions/data_processing.cpp
index 5b88b0af3..17ab1a5ba 100644
--- a/src/core/arm/jit_x64/instructions/data_processing.cpp
+++ b/src/core/arm/jit_x64/instructions/data_processing.cpp
@@ -72,12 +72,9 @@ void JitX64::ADC_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
     });
 
     if (S) {
-        cond_manager.FlagsDirty();
         UpdateFlagsZVCN();
     }
 
-    reg_alloc.AssertNoLocked();
-
     current.arm_pc += GetInstSize();
     if (Rd_index == 15) {
         CompileReturnToDispatch();
@@ -94,12 +91,9 @@ void JitX64::ADD_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
     });
 
     if (S) {
-        cond_manager.FlagsDirty();
         UpdateFlagsZVCN();
     }
 
-    reg_alloc.AssertNoLocked();
-
     current.arm_pc += GetInstSize();
     if (Rd_index == 15) {
         CompileReturnToDispatch();
@@ -116,15 +110,12 @@ void JitX64::AND_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
     });
 
     if (S) {
-        cond_manager.FlagsDirty();
         UpdateFlagsZN();
         if (rotate != 0) {
             code->MOV(32, MJitStateCFlag(), Imm32(immediate & 0x80000000 ? 1 : 0));
         }
     }
 
-    reg_alloc.AssertNoLocked();
-
     current.arm_pc += GetInstSize();
     if (Rd_index == 15) {
         CompileReturnToDispatch();
@@ -141,15 +132,12 @@ void JitX64::BIC_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
     });
 
     if (S) {
-        cond_manager.FlagsDirty();
         UpdateFlagsZN();
         if (rotate != 0) {
             code->MOV(32, MJitStateCFlag(), Imm32(immediate & 0x80000000 ? 1 : 0));
         }
     }
 
-    reg_alloc.AssertNoLocked();
-
     current.arm_pc += GetInstSize();
     if (Rd_index == 15) {
         CompileReturnToDispatch();
@@ -169,15 +157,12 @@ void JitX64::EOR_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
     });
 
     if (S) {
-        cond_manager.FlagsDirty();
         UpdateFlagsZN();
         if (rotate != 0) {
             code->MOV(32, MJitStateCFlag(), Imm32(immediate & 0x80000000 ? 1 : 0));
         }
     }
 
-    reg_alloc.AssertNoLocked();
-
     current.arm_pc += GetInstSize();
     if (Rd_index == 15) {
         CompileReturnToDispatch();
@@ -194,7 +179,6 @@ void JitX64::MOV_imm(Cond cond, bool S, ArmReg Rd_index, int rotate, ArmImm8 imm
     reg_alloc.UnlockArm(Rd_index);
 
     if (S) {
-        cond_manager.FlagsDirty();
         Gen::OpArg Rd = reg_alloc.LockArmForRead(Rd_index);
         code->CMP(32, Rd, Imm32(0));
         reg_alloc.UnlockArm(Rd_index);
@@ -204,8 +188,6 @@ void JitX64::MOV_imm(Cond cond, bool S, ArmReg Rd_index, int rotate, ArmImm8 imm
         }
     }
 
-    reg_alloc.AssertNoLocked();
-
     current.arm_pc += GetInstSize();
     if (Rd_index == 15) {
         CompileReturnToDispatch();
@@ -222,7 +204,6 @@ void JitX64::MVN_imm(Cond cond, bool S, ArmReg Rd_index, int rotate, ArmImm8 imm
     reg_alloc.UnlockArm(Rd_index);
 
     if (S) {
-        cond_manager.FlagsDirty();
         Gen::OpArg Rd = reg_alloc.LockArmForRead(Rd_index);
         code->CMP(32, Rd, Imm32(0));
         reg_alloc.UnlockArm(Rd_index);
@@ -232,8 +213,6 @@ void JitX64::MVN_imm(Cond cond, bool S, ArmReg Rd_index, int rotate, ArmImm8 imm
         }
     }
 
-    reg_alloc.AssertNoLocked();
-
     current.arm_pc += GetInstSize();
     if (Rd_index == 15) {
         CompileReturnToDispatch();
@@ -250,15 +229,12 @@ void JitX64::ORR_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
     });
 
     if (S) {
-        cond_manager.FlagsDirty();
         UpdateFlagsZN();
         if (rotate != 0) {
             code->MOV(32, MJitStateCFlag(), Imm32(immediate & 0x80000000 ? 1 : 0));
         }
     }
 
-    reg_alloc.AssertNoLocked();
-
     current.arm_pc += GetInstSize();
     if (Rd_index == 15) {
         CompileReturnToDispatch();
@@ -283,13 +259,10 @@ void JitX64::RSB_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
     });
 
     if (S) {
-        cond_manager.FlagsDirty();
         UpdateFlagsZVN();
         UpdateFlagsC_complement();
     }
 
-    reg_alloc.AssertNoLocked();
-
     current.arm_pc += GetInstSize();
     if (Rd_index == 15) {
         CompileReturnToDispatch();
@@ -317,13 +290,10 @@ void JitX64::RSC_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
     });
 
     if (S) {
-        cond_manager.FlagsDirty();
         UpdateFlagsZVN();
         UpdateFlagsC_complement();
     }
 
-    reg_alloc.AssertNoLocked();
-
     current.arm_pc += GetInstSize();
     if (Rd_index == 15) {
         CompileReturnToDispatch();
@@ -342,13 +312,10 @@ void JitX64::SBC_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
     });
 
     if (S) {
-        cond_manager.FlagsDirty();
         UpdateFlagsZVN();
         UpdateFlagsC_complement();
     }
 
-    reg_alloc.AssertNoLocked();
-
     current.arm_pc += GetInstSize();
     if (Rd_index == 15) {
         CompileReturnToDispatch();
@@ -365,13 +332,10 @@ void JitX64::SUB_imm(Cond cond, bool S, ArmReg Rn_index, ArmReg Rd_index, int ro
     });
 
     if (S) {
-        cond_manager.FlagsDirty();
         UpdateFlagsZVN();
         UpdateFlagsC_complement();
     }
 
-    reg_alloc.AssertNoLocked();
-
     current.arm_pc += GetInstSize();
     if (Rd_index == 15) {
         CompileReturnToDispatch();
@@ -397,14 +361,11 @@ void JitX64::TEQ_imm(Cond cond, ArmReg Rn_index, int rotate, ArmImm8 imm8) {
 
     reg_alloc.UnlockTemp(Rn_tmp);
 
-    cond_manager.FlagsDirty();
     UpdateFlagsZN();
     if (rotate != 0) {
         code->MOV(32, MJitStateCFlag(), Imm32(immediate & 0x80000000 ? 1 : 0));
     }
 
-    reg_alloc.AssertNoLocked();
-
     current.arm_pc += GetInstSize();
 }
 
@@ -430,14 +391,11 @@ void JitX64::TST_imm(Cond cond, ArmReg Rn_index, int rotate, ArmImm8 imm8) {
         reg_alloc.UnlockArm(Rn_index);
     }
 
-    cond_manager.FlagsDirty();
     UpdateFlagsZN();
     if (rotate != 0) {
         code->MOV(32, MJitStateCFlag(), Imm32(immediate & 0x80000000 ? 1 : 0));
     }
 
-    reg_alloc.AssertNoLocked();
-
     current.arm_pc += GetInstSize();
 }
 
diff --git a/src/core/arm/jit_x64/interface.cpp b/src/core/arm/jit_x64/interface.cpp
index 81b7d7cea..46e2f267f 100644
--- a/src/core/arm/jit_x64/interface.cpp
+++ b/src/core/arm/jit_x64/interface.cpp
@@ -51,7 +51,6 @@ public:
         cpu->VFlag = (cpu->Cpsr >> 28) & 1;
         cpu->TFlag = (cpu->Cpsr >> 5) & 1;
 
-        jit_state->bb = bb;
         jit_state->cycles_remaining = cycles_to_run;
         jit_state->return_RIP = (u64)CallCodeReturnAddress();
 
@@ -87,7 +86,7 @@ namespace JitX64 {
 
 static Gen::RunJittedCode run_jit = {};
 static Gen::BlockOfCode block_of_code = {};
-static JitX64 compiler = { &block_of_code };
+static JitX64 compiler { &block_of_code };
 
 ARM_Jit::ARM_Jit(PrivilegeMode initial_mode) {
     ASSERT_MSG(initial_mode == PrivilegeMode::USER32MODE, "Unimplemented");
diff --git a/src/core/arm/jit_x64/jit_x64.cpp b/src/core/arm/jit_x64/jit_x64.cpp
index 4a5006664..b8e5aea64 100644
--- a/src/core/arm/jit_x64/jit_x64.cpp
+++ b/src/core/arm/jit_x64/jit_x64.cpp
@@ -10,7 +10,7 @@ namespace JitX64 {
 
 using namespace Gen;
 
-JitX64::JitX64(XEmitter* code_) : code(code_) {}
+JitX64::JitX64(XEmitter* code_) : code(code_), current(0, false, false) {}
 
 void JitX64::ClearCache() {
     basic_blocks.clear();
@@ -49,6 +49,8 @@ CodePtr JitX64::Compile(u32 pc, bool TFlag, bool EFlag) {
         } else {
             CompileSingleArmInstruction();
         }
+
+        reg_alloc.AssertNoLocked();
     } while (!stop_compilation && ((current.arm_pc & 0xFFF) != 0));
 
     if (!stop_compilation) {
diff --git a/src/core/arm/jit_x64/jit_x64.h b/src/core/arm/jit_x64/jit_x64.h
index da4333d8a..1d7bd8088 100644
--- a/src/core/arm/jit_x64/jit_x64.h
+++ b/src/core/arm/jit_x64/jit_x64.h
@@ -19,6 +19,8 @@ namespace JitX64 {
 using CodePtr = u8*;
 
 struct LocationDescriptor {
+    LocationDescriptor() = delete;
+    LocationDescriptor(u32 arm_pc, bool TFlag, bool EFlag) : arm_pc(arm_pc), TFlag(TFlag), EFlag(EFlag) {}
     u32 arm_pc;
     bool TFlag; ///< Thumb / ARM
     bool EFlag; ///< Big / Little Endian
@@ -36,7 +38,7 @@ struct LocationDescriptorHash {
 
 class JitX64 final : private ArmDecoder::Visitor {
 private:
-    Gen::XEmitter* code;
+    Gen::XEmitter* code = nullptr;
 
     RegAlloc reg_alloc;
 
@@ -45,7 +47,7 @@ private:
 
 public:
     JitX64() = delete;
-    JitX64(Gen::XEmitter* code_);
+    explicit JitX64(Gen::XEmitter* code_);
     ~JitX64() override {}
 
     void ClearCache();
@@ -60,7 +62,7 @@ private:
     unsigned instructions_compiled;
     bool stop_compilation;
 
-    size_t GetInstSize() { return current.TFlag ? 2 : 4; }
+    size_t GetInstSize() const { return current.TFlag ? 2 : 4; }
     void CompileSingleArmInstruction();
     void CompileSingleThumbInstruction();
 
@@ -91,27 +93,31 @@ private:
     Gen::OpArg MJitStateExclusiveTag();
     Gen::OpArg MJitStateExclusiveState();
 
-    FORCE_INLINE u32 GetReg15Value() { return (current.arm_pc & ~0x1) + GetInstSize() * 2; }
+    u32 GetReg15Value() const { return (current.arm_pc & ~0x1) + GetInstSize() * 2; }
 
-    FORCE_INLINE void UpdateFlagsZVCN() {
+    void UpdateFlagsZVCN() {
+        cond_manager.FlagsDirty();
         code->SETcc(Gen::CC_Z, MJitStateZFlag());
         code->SETcc(Gen::CC_C, MJitStateCFlag());
         code->SETcc(Gen::CC_O, MJitStateVFlag());
         code->SETcc(Gen::CC_S, MJitStateNFlag());
     }
 
-    FORCE_INLINE void UpdateFlagsZVN() {
+    void UpdateFlagsZVN() {
+        cond_manager.FlagsDirty();
         code->SETcc(Gen::CC_Z, MJitStateZFlag());
         code->SETcc(Gen::CC_O, MJitStateVFlag());
         code->SETcc(Gen::CC_S, MJitStateNFlag());
     }
 
-    FORCE_INLINE void UpdateFlagsZN() {
+    void UpdateFlagsZN() {
+        cond_manager.FlagsDirty();
         code->SETcc(Gen::CC_Z, MJitStateZFlag());
         code->SETcc(Gen::CC_S, MJitStateNFlag());
     }
 
-    FORCE_INLINE void UpdateFlagsC_complement() {
+    void UpdateFlagsC_complement() {
+        cond_manager.FlagsDirty();
         code->SETcc(Gen::CC_NC, MJitStateCFlag());
     }