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https://github.com/citra-emu/citra.git
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Added TBAA
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parent
d7367172e8
commit
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@ -5,6 +5,7 @@ set(SRCS
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Disassembler.cpp
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Disassembler.cpp
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InstructionBlock.cpp
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InstructionBlock.cpp
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MachineState.cpp
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MachineState.cpp
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TBAA.cpp
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Instructions/Instruction.cpp
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Instructions/Instruction.cpp
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Instructions/DataProcessing.cpp
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Instructions/DataProcessing.cpp
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@ -15,6 +16,7 @@ set(HEADERS
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Disassembler.h
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Disassembler.h
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InstructionBlock.h
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InstructionBlock.h
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MachineState.h
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MachineState.h
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TBAA.h
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Instructions/Types.h
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Instructions/Types.h
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Instructions/Instruction.h
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Instructions/Instruction.h
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@ -1,3 +1,5 @@
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#pragma once
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/*
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/*
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* A register in a broad sense: R0-R15, and flags
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* A register in a broad sense: R0-R15, and flags
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*/
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*/
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@ -5,9 +7,12 @@ enum class Register
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{
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{
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R0, R1, R2, R3, R4, R5, R6, R7,
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R0, R1, R2, R3, R4, R5, R6, R7,
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R8, R9, R10, R11, R12, SP, LR, PC,
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R8, R9, R10, R11, R12, SP, LR, PC,
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N, Z, C, V
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N, Z, C, V,
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Count
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};
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};
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static const size_t RegisterCount = static_cast<size_t>(Register::Count);
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enum class Condition
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enum class Condition
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{
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{
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EQ, NE, CS, CC, MI, PL, VS, VC, HI, LS, GE, LT, GT, LE, AL, Invalid
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EQ, NE, CS, CC, MI, PL, VS, VC, HI, LS, GE, LT, GT, LE, AL, Invalid
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@ -26,13 +26,15 @@ void MachineState::GenerateGlobals()
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Value* MachineState::ReadRegiser(Register reg)
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Value* MachineState::ReadRegiser(Register reg)
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{
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{
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auto load = module->IrBuilder()->CreateLoad(GetRegisterPtr(reg));
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auto load = module->IrBuilder()->CreateAlignedLoad(GetRegisterPtr(reg), 4);
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module->GetTBAA()->TagRegister(load, reg);
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return load;
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return load;
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}
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}
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Value* MachineState::WriteRegiser(Register reg, Value *value)
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Value* MachineState::WriteRegiser(Register reg, Value *value)
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{
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{
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auto store = module->IrBuilder()->CreateAlignedStore(value, GetRegisterPtr(reg), 4);
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auto store = module->IrBuilder()->CreateAlignedStore(value, GetRegisterPtr(reg), 4);
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module->GetTBAA()->TagRegister(store, reg);
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return store;
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return store;
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}
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}
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@ -51,5 +53,6 @@ Value *MachineState::GetRegisterPtr(Register reg)
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index = static_cast<unsigned>(reg)-static_cast<unsigned>(Register::N);
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index = static_cast<unsigned>(reg)-static_cast<unsigned>(Register::N);
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}
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}
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auto base = module->IrBuilder()->CreateAlignedLoad(global, 4);
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auto base = module->IrBuilder()->CreateAlignedLoad(global, 4);
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module->GetTBAA()->TagConst(base);
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return module->IrBuilder()->CreateConstInBoundsGEP1_32(base, index);
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return module->IrBuilder()->CreateConstInBoundsGEP1_32(base, index);
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}
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}
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@ -17,6 +17,7 @@ ModuleGen::ModuleGen(llvm::Module* module)
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{
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{
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ir_builder = make_unique<IRBuilder<>>(getGlobalContext());
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ir_builder = make_unique<IRBuilder<>>(getGlobalContext());
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machine = make_unique<MachineState>(this);
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machine = make_unique<MachineState>(this);
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tbaa = make_unique<TBAA>();
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}
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}
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ModuleGen::~ModuleGen()
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ModuleGen::~ModuleGen()
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@ -25,6 +26,7 @@ ModuleGen::~ModuleGen()
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void ModuleGen::Run()
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void ModuleGen::Run()
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{
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{
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tbaa->GenerateTags();
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GenerateGlobals();
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GenerateGlobals();
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DecodeInstructions();
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DecodeInstructions();
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@ -133,6 +135,7 @@ void ModuleGen::GenerateGetBlockAddressFunction()
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ir_builder->SetInsertPoint(index_in_bounds_basic_block);
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ir_builder->SetInsertPoint(index_in_bounds_basic_block);
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Value *gep_values[] = { ir_builder->getInt32(0), index };
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Value *gep_values[] = { ir_builder->getInt32(0), index };
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auto block_address = ir_builder->CreateLoad(ir_builder->CreateInBoundsGEP(block_address_array, gep_values));
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auto block_address = ir_builder->CreateLoad(ir_builder->CreateInBoundsGEP(block_address_array, gep_values));
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tbaa->TagConst(block_address);
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ir_builder->CreateRet(block_address);
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ir_builder->CreateRet(block_address);
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ir_builder->SetInsertPoint(index_out_of_bounds_basic_block);
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ir_builder->SetInsertPoint(index_out_of_bounds_basic_block);
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@ -1,6 +1,7 @@
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#include <llvm/IR/IRBuilder.h>
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#include <llvm/IR/IRBuilder.h>
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#include <unordered_map>
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#include <unordered_map>
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#include <common/common_types.h>
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#include <common/common_types.h>
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#include "TBAA.h"
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enum class Register;
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enum class Register;
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@ -28,6 +29,7 @@ public:
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llvm::IRBuilder<> *IrBuilder() { return ir_builder.get(); }
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llvm::IRBuilder<> *IrBuilder() { return ir_builder.get(); }
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llvm::Module *Module() { return module; }
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llvm::Module *Module() { return module; }
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MachineState *Machine() { return machine.get(); }
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MachineState *Machine() { return machine.get(); }
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TBAA *GetTBAA() { return tbaa.get(); }
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private:
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private:
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// Generates the declarations of all the globals of the module
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// Generates the declarations of all the globals of the module
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@ -46,6 +48,7 @@ private:
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void AddInstructionsToRunFunction();
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void AddInstructionsToRunFunction();
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std::unique_ptr<MachineState> machine;
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std::unique_ptr<MachineState> machine;
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std::unique_ptr<TBAA> tbaa;
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std::unique_ptr<llvm::IRBuilder<>> ir_builder;
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std::unique_ptr<llvm::IRBuilder<>> ir_builder;
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llvm::Module *module;
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llvm::Module *module;
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33
src/binary_translation/TBAA.cpp
Normal file
33
src/binary_translation/TBAA.cpp
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@ -0,0 +1,33 @@
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#include "TBAA.h"
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#include <llvm/IR/MDBuilder.h>
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#include <llvm/IR/LLVMContext.h>
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#include <llvm/IR/Metadata.h>
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#include <sstream>
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#include <llvm/IR/Instruction.h>
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using namespace llvm;
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void TBAA::GenerateTags()
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{
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MDBuilder md_builder(getGlobalContext());
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auto tbaa_root = md_builder.createTBAARoot("Root");
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for (auto i = 0; i < RegisterCount; ++i)
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{
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std::stringstream ss;
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ss << "Register_" << i;
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register_nodes[i] = md_builder.createTBAAScalarTypeNode(ss.str(), tbaa_root);
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}
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const_node = md_builder.createTBAAScalarTypeNode("Readonly", tbaa_root);
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}
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void TBAA::TagRegister(Instruction* instruction, Register reg)
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{
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instruction->setMetadata(LLVMContext::MD_tbaa, register_nodes[(int)reg]);
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}
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void TBAA::TagConst(Instruction* instruction)
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{
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instruction->setMetadata(LLVMContext::MD_tbaa, const_node);
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}
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28
src/binary_translation/TBAA.h
Normal file
28
src/binary_translation/TBAA.h
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@ -0,0 +1,28 @@
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#include "Instructions/Types.h"
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namespace llvm
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{
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class Instruction;
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class MDNode;
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}
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/*
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Manages TBAA.
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A TBAA type is generated for each register and global.
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It is a bit of an abuse of TBAA but because nothing aliases it is a good way
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to notify LLVM of it.
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*/
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class TBAA
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{
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public:
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void GenerateTags();
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void TagRegister(llvm::Instruction *instruction, Register reg);
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void TagConst(llvm::Instruction *instruction);
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private:
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llvm::MDNode *register_nodes[RegisterCount];
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// Tag for everything that is never written.
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// Since it is never written, one tag works
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llvm::MDNode *const_node;
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};
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