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Pica: Add command processor.
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parent
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commit
76a586de49
@ -78,7 +78,7 @@ QVariant GPUCommandListModel::data(const QModelIndex& index, int role) const
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// index refers to a specific command
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const GraphicsDebugger::PicaCommandList& cmdlist = command_lists[item->parent->index].second;
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const GraphicsDebugger::PicaCommand& cmd = cmdlist[item->index];
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const Pica::CommandHeader& header = cmd.GetHeader();
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const Pica::CommandProcessor::CommandHeader& header = cmd.GetHeader();
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if (role == Qt::DisplayRole) {
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QString content;
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@ -14,6 +14,7 @@
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#include "core/hw/gpu.h"
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#include "video_core/command_processor.h"
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#include "video_core/video_core.h"
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@ -143,14 +144,15 @@ inline void Write(u32 addr, const T data) {
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break;
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}
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// Seems like writing to this register triggers processing
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case GPU_REG_INDEX(command_processor_config.trigger):
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{
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const auto& config = g_regs.command_processor_config;
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if (config.trigger & 1)
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{
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// u32* buffer = (u32*)Memory::GetPointer(config.GetPhysicalAddress());
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ERROR_LOG(GPU, "Beginning 0x%08x bytes of commands from address 0x%08x", config.size, config.GetPhysicalAddress());
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// TODO: Process command list!
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u32* buffer = (u32*)Memory::GetPointer(Memory::PhysicalToVirtualAddress(config.GetPhysicalAddress()));
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u32 size = config.size << 3;
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Pica::CommandProcessor::ProcessCommandList(buffer, size);
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}
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break;
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}
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@ -1,11 +1,14 @@
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set(SRCS video_core.cpp
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set(SRCS command_processor.cpp
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utils.cpp
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video_core.cpp
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renderer_opengl/renderer_opengl.cpp)
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set(HEADERS math.h
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set(HEADERS command_processor.h
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math.h
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utils.h
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video_core.h
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renderer_base.h
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video_core.h
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renderer_opengl/renderer_opengl.h)
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add_library(video_core STATIC ${SRCS} ${HEADERS})
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60
src/video_core/command_processor.cpp
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60
src/video_core/command_processor.cpp
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@ -0,0 +1,60 @@
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// Copyright 2014 Citra Emulator Project
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// Licensed under GPLv2
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// Refer to the license.txt file included.
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#include "pica.h"
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#include "command_processor.h"
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namespace Pica {
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Regs registers;
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namespace CommandProcessor {
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static inline void WritePicaReg(u32 id, u32 value) {
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u32 old_value = registers[id];
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registers[id] = value;
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switch(id) {
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// TODO: Perform actions for anything which requires special treatment here...
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default:
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break;
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}
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}
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static std::ptrdiff_t ExecuteCommandBlock(const u32* first_command_word) {
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const CommandHeader& header = *(const CommandHeader*)(&first_command_word[1]);
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u32* read_pointer = (u32*)first_command_word;
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// TODO: Take parameter mask into consideration!
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WritePicaReg(header.cmd_id, *read_pointer);
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read_pointer += 2;
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for (int i = 1; i < 1+header.extra_data_length; ++i) {
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u32 cmd = header.cmd_id + ((header.group_commands) ? i : 0);
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WritePicaReg(cmd, *read_pointer);
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++read_pointer;
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}
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// align read pointer to 8 bytes
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if ((first_command_word - read_pointer) % 2)
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++read_pointer;
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return read_pointer - first_command_word;
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}
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void ProcessCommandList(const u32* list, u32 size) {
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u32* read_pointer = (u32*)list;
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while (read_pointer < list + size) {
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read_pointer += ExecuteCommandBlock(read_pointer);
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}
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}
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} // namespace
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} // namespace
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31
src/video_core/command_processor.h
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31
src/video_core/command_processor.h
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@ -0,0 +1,31 @@
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// Copyright 2014 Citra Emulator Project
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// Licensed under GPLv2
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// Refer to the license.txt file included.
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#pragma once
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#include "common/bit_field.h"
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#include "common/common_types.h"
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#include "pica.h"
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namespace Pica {
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namespace CommandProcessor {
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union CommandHeader {
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u32 hex;
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BitField< 0, 16, u32> cmd_id;
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BitField<16, 4, u32> parameter_mask;
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BitField<20, 11, u32> extra_data_length;
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BitField<31, 1, u32> group_commands;
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};
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static_assert(std::is_standard_layout<CommandHeader>::value == true, "CommandHeader does not use standard layout");
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static_assert(sizeof(CommandHeader) == sizeof(u32), "CommandHeader has incorrect size!");
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void ProcessCommandList(const u32* list, u32 size);
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} // namespace
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} // namespace
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@ -11,6 +11,8 @@
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#include "common/log.h"
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#include "core/hle/service/gsp.h"
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#include "command_processor.h"
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#include "pica.h"
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class GraphicsDebugger
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@ -20,10 +22,10 @@ public:
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// A vector of commands represented by their raw byte sequence
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struct PicaCommand : public std::vector<u32>
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{
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const Pica::CommandHeader& GetHeader() const
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const Pica::CommandProcessor::CommandHeader& GetHeader() const
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{
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const u32& val = at(1);
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return *(Pica::CommandHeader*)&val;
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return *(Pica::CommandProcessor::CommandHeader*)&val;
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}
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};
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@ -99,7 +101,7 @@ public:
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PicaCommandList cmdlist;
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for (u32* parse_pointer = command_list; parse_pointer < command_list + size_in_words;)
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{
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const Pica::CommandHeader header = static_cast<Pica::CommandHeader>(parse_pointer[1]);
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const Pica::CommandProcessor::CommandHeader& header = *(Pica::CommandProcessor::CommandHeader*)(&parse_pointer[1]);
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cmdlist.push_back(PicaCommand());
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auto& cmd = cmdlist.back();
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@ -161,6 +161,8 @@ ASSERT_REG_POSITION(vertex_descriptor, 0x200);
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// The total number of registers is chosen arbitrarily, but let's make sure it's not some odd value anyway.
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static_assert(sizeof(Regs) == 0x300 * sizeof(u32), "Invalid total size of register set");
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extern Regs registers; // TODO: Not sure if we want to have one global instance for this
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struct float24 {
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static float24 FromFloat32(float val) {
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@ -20,10 +20,12 @@
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</ItemGroup>
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<ItemGroup>
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<ClCompile Include="renderer_opengl\renderer_opengl.cpp" />
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<ClCompile Include="command_processor.cpp" />
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<ClCompile Include="utils.cpp" />
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<ClCompile Include="video_core.cpp" />
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</ItemGroup>
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<ItemGroup>
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<ClInclude Include="command_processor.h" />
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<ClInclude Include="gpu_debugger.h" />
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<ClInclude Include="math.h" />
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<ClInclude Include="pica.h" />
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@ -9,6 +9,7 @@
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<ClCompile Include="renderer_opengl\renderer_opengl.cpp">
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<Filter>renderer_opengl</Filter>
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</ClCompile>
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<ClCompile Include="command_processor.cpp" />
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<ClCompile Include="utils.cpp" />
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<ClCompile Include="video_core.cpp" />
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</ItemGroup>
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@ -16,6 +17,7 @@
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<ClInclude Include="renderer_opengl\renderer_opengl.h">
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<Filter>renderer_opengl</Filter>
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</ClInclude>
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<ClInclude Include="command_processor.h" />
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<ClInclude Include="gpu_debugger.h" />
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<ClInclude Include="math.h" />
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<ClInclude Include="pica.h" />
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