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armemu: Fix SSUB16
Broken from the same reason SADD16 was. The lo part of the result should only be constructed from the lo halfwords of rm and rn. The hi part of the result should only be constructed from the hi halfwords of rm and rn.
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@ -5801,14 +5801,14 @@ L_stm_s_takeabort:
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break;
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case 0x61:
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if ((instr & 0xFF0) == 0xf70) { //ssub16
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u8 tar = BITS(12, 15);
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u8 src1 = BITS(16, 19);
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u8 src2 = BITS(0, 3);
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s16 a1 = (state->Reg[src1] & 0xFFFF);
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s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF);
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s16 b1 = (state->Reg[src2] & 0xFFFF);
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s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF);
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state->Reg[tar] = ((a1 - a2) & 0xFFFF) | (((b1 - b2) & 0xFFFF) << 0x10);
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const u8 rd_idx = BITS(12, 15);
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const u8 rm_idx = BITS(0, 3);
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const u8 rn_idx = BITS(16, 19);
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const s16 rn_lo = (state->Reg[rn_idx] & 0xFFFF);
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const s16 rn_hi = ((state->Reg[rn_idx] >> 16) & 0xFFFF);
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const s16 rm_lo = (state->Reg[rm_idx] & 0xFFFF);
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const s16 rm_hi = ((state->Reg[rm_idx] >> 16) & 0xFFFF);
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state->Reg[rd_idx] = ((rn_lo - rm_lo) & 0xFFFF) | (((rn_hi - rm_hi) & 0xFFFF) << 16);
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return 1;
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} else if ((instr & 0xFF0) == 0xf10) { //sadd16
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const u8 rd_idx = BITS(12, 15);
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