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JitX64: Implement ARM_Jit::ClearCache()
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02c3484dbc
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@ -217,9 +217,9 @@ void ARM_Jit::PrepareReschedule() {
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}
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}
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void ARM_Jit::ClearCache() {
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void ARM_Jit::ClearCache() {
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UNIMPLEMENTED();
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compiler.ClearCache();
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// compiler.ClearCache();
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block_of_code.ClearCodeSpace();
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this->state->cpu_state.instruction_cache.clear();
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state->cpu_state.instruction_cache.clear();
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}
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}
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}
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}
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@ -40,7 +40,7 @@ public:
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void PrepareReschedule() override;
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void PrepareReschedule() override;
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void ExecuteInstructions(int num_instructions) override;
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void ExecuteInstructions(int num_instructions) override;
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void ClearCache();
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void ClearCache() override;
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private:
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private:
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bool reschedule;
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bool reschedule;
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@ -2,6 +2,7 @@
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// Licensed under GPLv2 or any later version
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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// Refer to the license.txt file included.
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#include "core/arm/dyncom/arm_dyncom_interpreter.h"
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#include "core/arm/jit_x64/jit_x64.h"
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#include "core/arm/jit_x64/jit_x64.h"
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#include "core/memory.h"
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#include "core/memory.h"
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@ -11,6 +12,12 @@ using namespace Gen;
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JitX64::JitX64(XEmitter* code_) : code(code_) {}
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JitX64::JitX64(XEmitter* code_) : code(code_) {}
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void JitX64::ClearCache() {
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basic_blocks.clear();
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patch_jmp_locations.clear();
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InterpreterClearCache();
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}
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CodePtr JitX64::GetBB(u32 pc, bool TFlag, bool EFlag) {
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CodePtr JitX64::GetBB(u32 pc, bool TFlag, bool EFlag) {
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const LocationDescriptor desc = { pc, TFlag, EFlag };
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const LocationDescriptor desc = { pc, TFlag, EFlag };
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@ -48,6 +48,8 @@ public:
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JitX64(Gen::XEmitter* code_);
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JitX64(Gen::XEmitter* code_);
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virtual ~JitX64() override {}
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virtual ~JitX64() override {}
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void ClearCache();
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CodePtr GetBB(u32 pc, bool TFlag, bool EFlag);
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CodePtr GetBB(u32 pc, bool TFlag, bool EFlag);
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/// Returns a pointer to the compiled basic block.
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/// Returns a pointer to the compiled basic block.
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