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cleanup
This commit is contained in:
Anon
parent
9535169577
commit
3be6948ca4
@ -35,21 +35,21 @@
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namespace GPU {
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Regs g_regs;
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Regs g_regs;
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/// True if the current frame was skipped
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bool g_skip_frame;
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/// 268MHz CPU clocks / 60Hz frames per second
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const u64 frame_ticks = 268123480ull / 60;
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/// Event id for CoreTiming
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static int vblank_event;
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/// Total number of frames drawn
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static u64 frame_count;
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/// True if the last frame was skipped
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static bool last_skip_frame;
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/// True if the current frame was skipped
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bool g_skip_frame;
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/// 268MHz CPU clocks / 60Hz frames per second
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const u64 frame_ticks = 268123480ull / 60;
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/// Event id for CoreTiming
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static int vblank_event;
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/// Total number of frames drawn
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static u64 frame_count;
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/// True if the last frame was skipped
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static bool last_skip_frame;
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template <typename T>
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inline void Read(T &var, const u32 raw_addr) {
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template <typename T>
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inline void Read(T &var, const u32 raw_addr) {
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u32 addr = raw_addr - HW::VADDR_GPU;
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u32 index = addr / 4;
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@ -60,9 +60,9 @@ namespace GPU {
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}
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var = g_regs[addr / 4];
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}
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}
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static Math::Vec4<u8> DecodePixel(Regs::PixelFormat input_format, const u8* src_pixel) {
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static Math::Vec4<u8> DecodePixel(Regs::PixelFormat input_format, const u8* src_pixel) {
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switch (input_format) {
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case Regs::PixelFormat::RGBA8:
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return Color::DecodeRGBA8(src_pixel);
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@ -81,15 +81,15 @@ namespace GPU {
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default:
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LOG_ERROR(HW_GPU, "Unknown source framebuffer format %x", input_format);
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return{ 0, 0, 0, 0 };
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}
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return {0, 0, 0, 0};
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}
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}
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MICROPROFILE_DEFINE(GPU_DisplayTransfer, "GPU", "DisplayTransfer", MP_RGB(100, 100, 255));
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MICROPROFILE_DEFINE(GPU_CmdlistProcessing, "GPU", "Cmdlist Processing", MP_RGB(100, 255, 100));
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MICROPROFILE_DEFINE(GPU_DisplayTransfer, "GPU", "DisplayTransfer", MP_RGB(100, 100, 255));
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MICROPROFILE_DEFINE(GPU_CmdlistProcessing, "GPU", "Cmdlist Processing", MP_RGB(100, 255, 100));
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template <typename T>
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inline void Write(u32 addr, const T data) {
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template <typename T>
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inline void Write(u32 addr, const T data) {
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addr -= HW::VADDR_GPU;
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u32 index = addr / 4;
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@ -134,8 +134,7 @@ namespace GPU {
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ptr[1] = config.value_24bit_g;
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ptr[2] = config.value_24bit_b;
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}
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}
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else if (config.fill_32bit) {
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} else if (config.fill_32bit) {
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// fill with 32-bit values
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if (end > start) {
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u32 value = config.value_32bit;
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@ -143,8 +142,7 @@ namespace GPU {
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for (size_t i = 0; i < len; ++i)
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memcpy(&start[i * sizeof(u32)], &value, sizeof(u32));
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}
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}
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else {
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} else {
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// fill with 16-bit values
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u16 value_16bit = config.value_16bit.Value();
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for (u8* ptr = start; ptr < end; ptr += sizeof(u16))
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@ -156,8 +154,7 @@ namespace GPU {
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if (!is_second_filler) {
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GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::PSC0);
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}
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else {
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} else {
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GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::PSC1);
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}
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}
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@ -283,14 +280,12 @@ namespace GPU {
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src_offset = (input_x + input_y * config.input_width) * src_bytes_per_pixel;
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dst_offset = VideoCore::GetMortonOffset(x, y, dst_bytes_per_pixel) + coarse_y * stride;
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}
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else {
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} else {
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// Both input and output are linear
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src_offset = (input_x + input_y * config.input_width) * src_bytes_per_pixel;
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dst_offset = (x + y * output_width) * dst_bytes_per_pixel;
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}
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}
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else {
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} else {
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if (!config.dont_swizzle) {
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// Interpret the input as tiled and the output as linear
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u32 coarse_y = input_y & ~7;
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@ -298,8 +293,7 @@ namespace GPU {
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src_offset = VideoCore::GetMortonOffset(input_x, input_y, src_bytes_per_pixel) + coarse_y * stride;
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dst_offset = (x + y * output_width) * dst_bytes_per_pixel;
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}
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else {
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} else {
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// Both input and output are tiled
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u32 out_coarse_y = y & ~7;
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u32 out_stride = output_width * dst_bytes_per_pixel;
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@ -317,8 +311,7 @@ namespace GPU {
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if (config.scaling == config.ScaleX) {
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Math::Vec4<u8> pixel = DecodePixel(config.input_format, src_pixel + src_bytes_per_pixel);
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src_color = ((src_color + pixel) / 2).Cast<u8>();
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}
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else if (config.scaling == config.ScaleXY) {
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} else if (config.scaling == config.ScaleXY) {
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Math::Vec4<u8> pixel1 = DecodePixel(config.input_format, src_pixel + 1 * src_bytes_per_pixel);
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Math::Vec4<u8> pixel2 = DecodePixel(config.input_format, src_pixel + 2 * src_bytes_per_pixel);
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Math::Vec4<u8> pixel3 = DecodePixel(config.input_format, src_pixel + 3 * src_bytes_per_pixel);
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@ -371,7 +364,8 @@ namespace GPU {
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case GPU_REG_INDEX(command_processor_config.trigger):
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{
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const auto& config = g_regs.command_processor_config;
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if (config.trigger & 1) {
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if (config.trigger & 1)
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{
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MICROPROFILE_SCOPE(GPU_CmdlistProcessing);
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u32* buffer = (u32*)Memory::GetPhysicalPointer(config.GetPhysicalAddress());
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@ -397,22 +391,22 @@ namespace GPU {
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// addr + GPU VBase - IO VBase + IO PBase
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Pica::g_debug_context->recorder->RegisterWritten<T>(addr + 0x1EF00000 - 0x1EC00000 + 0x10100000, data);
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}
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}
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}
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// Explicitly instantiate template functions because we aren't defining this in the header:
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// Explicitly instantiate template functions because we aren't defining this in the header:
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template void Read<u64>(u64 &var, const u32 addr);
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template void Read<u32>(u32 &var, const u32 addr);
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template void Read<u16>(u16 &var, const u32 addr);
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template void Read<u8>(u8 &var, const u32 addr);
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template void Read<u64>(u64 &var, const u32 addr);
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template void Read<u32>(u32 &var, const u32 addr);
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template void Read<u16>(u16 &var, const u32 addr);
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template void Read<u8>(u8 &var, const u32 addr);
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template void Write<u64>(u32 addr, const u64 data);
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template void Write<u32>(u32 addr, const u32 data);
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template void Write<u16>(u32 addr, const u16 data);
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template void Write<u8>(u32 addr, const u8 data);
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template void Write<u64>(u32 addr, const u64 data);
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template void Write<u32>(u32 addr, const u32 data);
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template void Write<u16>(u32 addr, const u16 data);
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template void Write<u8>(u32 addr, const u8 data);
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/// Update hardware
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static void VBlankCallback(u64 userdata, int cycles_late) {
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/// Update hardware
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static void VBlankCallback(u64 userdata, int cycles_late) {
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frame_count++;
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last_skip_frame = g_skip_frame;
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g_skip_frame = (frame_count & Settings::values.frame_skip) != 0;
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@ -438,10 +432,10 @@ namespace GPU {
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// Reschedule recurrent event
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CoreTiming::ScheduleEvent(frame_ticks - cycles_late, vblank_event);
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}
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}
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/// Initialize hardware
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void Init() {
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/// Initialize hardware
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void Init() {
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memset(&g_regs, 0, sizeof(g_regs));
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auto& framebuffer_top = g_regs.framebuffer_config[0];
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@ -478,11 +472,11 @@ namespace GPU {
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CoreTiming::ScheduleEvent(frame_ticks, vblank_event);
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LOG_DEBUG(HW_GPU, "initialized OK");
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}
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}
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/// Shutdown hardware
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void Shutdown() {
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/// Shutdown hardware
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void Shutdown() {
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LOG_DEBUG(HW_GPU, "shutdown OK");
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}
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}
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} // namespace
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