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Renamed DataProcessing to MovShift, reducing its scope

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This commit is contained in:
Dani Messerman 2015-05-01 23:07:33 +03:00
parent 8d21d9c6a8
commit 3151d6a99b
3 changed files with 9 additions and 26 deletions
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4
src/binary_translation/CMakeLists.txt
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@ -9,7 +9,7 @@ set(SRCS
ARMFuncs.cpp ARMFuncs.cpp
Instructions/Instruction.cpp Instructions/Instruction.cpp
Instructions/DataProcessing.cpp Instructions/MovShift.cpp
Instructions/Branch.cpp Instructions/Branch.cpp
) )
set(HEADERS set(HEADERS
@ -24,7 +24,7 @@ set(HEADERS
Instructions/Types.h Instructions/Types.h
Instructions/Instruction.h Instructions/Instruction.h
Instructions/DataProcessing.h Instructions/MovShift.h
Instructions/Branch.h Instructions/Branch.h
) )

17
src/binary_translation/Instructions/DataProcessing.cpp → src/binary_translation/Instructions/MovShift.cpp
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@ -1,15 +1,15 @@
#include "DataProcessing.h" #include "MovShift.h"
#include "Disassembler.h" #include "Disassembler.h"
#include "InstructionBlock.h" #include "InstructionBlock.h"
#include "ModuleGen.h" #include "ModuleGen.h"
#include "ARMFuncs.h" #include "ARMFuncs.h"
static RegisterInstruction<DataProcessing> register_instruction; static RegisterInstruction<MovShift> register_instruction;
bool DataProcessing::Decode() bool MovShift::Decode()
{ {
// Mov and shifts must have zeroes at some operands of different data processing instructions // Mov and shifts must have zeroes at some operands of different data processing instructions
if (ReadFields({ CondDef(), FieldDef<3>(0), FieldDef<4>((u32)ShortOpType::MoveAndShifts), FieldDef<1>(&s), FieldDef<4>(0), if (ReadFields({ CondDef(), FieldDef<3>(0), FieldDef<4>(13), FieldDef<1>(&s), FieldDef<4>(0),
FieldDef<4>(&rd), FieldDef<5>(&imm5), FieldDef<2>(&op2), FieldDef<1>(0), FieldDef<4>(&rm) })) FieldDef<4>(&rd), FieldDef<5>(&imm5), FieldDef<2>(&op2), FieldDef<1>(0), FieldDef<4>(&rm) }))
{ {
form = Form::Register; form = Form::Register;
@ -17,17 +17,10 @@ bool DataProcessing::Decode()
if (rd == Register::PC && s) return false; // SEE SUBS PC, LR and related instructions; if (rd == Register::PC && s) return false; // SEE SUBS PC, LR and related instructions;
return true; return true;
} }
if (ReadFields({ CondDef(), FieldDef<3>(1), FieldDef<4>(&short_op), FieldDef<1>(&s), FieldDef<4>(&rn),
FieldDef<4>(&rd), FieldDef<12>(&imm12) }))
{
// TODO: not implemented
form = Form::Immediate;
return false;
}
return false; return false;
} }
void DataProcessing::GenerateInstructionCode(InstructionBlock* instruction_block) void MovShift::GenerateInstructionCode(InstructionBlock* instruction_block)
{ {
auto ir_builder = instruction_block->IrBuilder(); auto ir_builder = instruction_block->IrBuilder();

12
src/binary_translation/Instructions/DataProcessing.h → src/binary_translation/Instructions/MovShift.h
View File

@ -6,18 +6,9 @@
* ARMv7-A 5.2.1 (register), 5.2.2 (register-shifted register, 5.2.3 (immediate) * ARMv7-A 5.2.1 (register), 5.2.2 (register-shifted register, 5.2.3 (immediate)
*/ */
class DataProcessing : public Instruction class MovShift : public Instruction
{ {
public: public:
/*
* The 4 bit op types (1 = 0001x: BitwiseXor, etc...)
*/
enum class ShortOpType
{
BitwiseAnd = 0, BitwiseXor, Subtract, RevSubtract, Add, AddWithCarry, SubtractWithCarry, ReverseSubtractWithCarry,
// Compare, Test, Misc
BitwiseOr = 12, MoveAndShifts, BitwiseBitClear, BitwiseNot
};
enum class Op2Type enum class Op2Type
{ {
MoveAndLSL, LSR, ASR, RRXAndROR MoveAndLSL, LSR, ASR, RRXAndROR
@ -32,7 +23,6 @@ public:
void GenerateInstructionCode(InstructionBlock* instruction_block) override; void GenerateInstructionCode(InstructionBlock* instruction_block) override;
private: private:
Form form; Form form;
ShortOpType short_op;
bool s; bool s;
Register rn; Register rn;
Register rd; Register rd;