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https://github.com/citra-emu/citra.git
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Memory: Re-organize and rename memory area address constants
This commit is contained in:
parent
eb3eb9f75d
commit
1c0b87edc2
@ -63,7 +63,7 @@ int Init() {
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// TODO: Whenever TLS is implemented, this should contain
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// the address of the 0x200-byte TLS
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g_app_core->SetCP15Register(CP15_THREAD_URO, Memory::KERNEL_MEMORY_VADDR);
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g_app_core->SetCP15Register(CP15_THREAD_URO, Memory::TLS_AREA_VADDR);
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LOG_DEBUG(Core, "Initialized OK");
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return 0;
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@ -17,7 +17,7 @@ static const int kCommandHeaderOffset = 0x80; ///< Offset into command buffer of
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* @return Pointer to command buffer
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*/
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inline static u32* GetCommandBuffer(const int offset=0) {
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return (u32*)Memory::GetPointer(Memory::KERNEL_MEMORY_VADDR + kCommandHeaderOffset + offset);
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return (u32*)Memory::GetPointer(Memory::TLS_AREA_VADDR + kCommandHeaderOffset + offset);
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}
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/**
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@ -443,7 +443,8 @@ void Thread::BoostPriority(s32 priority) {
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SharedPtr<Thread> SetupIdleThread() {
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// We need to pass a few valid values to get around parameter checking in Thread::Create.
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auto thread = Thread::Create("idle", Memory::KERNEL_MEMORY_VADDR, THREADPRIO_LOWEST, 0,
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// TODO(yuriks): Figure out a way to avoid passing the bogus VAddr parameter
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auto thread = Thread::Create("idle", Memory::TLS_AREA_VADDR, THREADPRIO_LOWEST, 0,
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THREADPROCESSORID_0, 0).MoveFrom();
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thread->idle = true;
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@ -455,7 +456,7 @@ SharedPtr<Thread> SetupMainThread(u32 stack_size, u32 entry_point, s32 priority)
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// Initialize new "main" thread
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auto thread_res = Thread::Create("main", entry_point, priority, 0,
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THREADPROCESSORID_0, Memory::SCRATCHPAD_VADDR_END);
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THREADPROCESSORID_0, Memory::HEAP_VADDR_END - stack_size);
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SharedPtr<Thread> thread = thread_res.MoveFrom();
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@ -42,7 +42,7 @@ static void ConvertProcessAddressFromDspDram(Service::Interface* self) {
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u32 addr = cmd_buff[1];
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cmd_buff[1] = 0; // No error
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cmd_buff[2] = (addr << 1) + (Memory::DSP_MEMORY_VADDR + 0x40000);
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cmd_buff[2] = (addr << 1) + (Memory::DSP_RAM_VADDR + 0x40000);
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LOG_WARNING(Service_DSP, "(STUBBED) called with address 0x%08X", addr);
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}
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@ -234,9 +234,9 @@ ResultStatus AppLoader_THREEDSX::Load() {
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Kernel::g_current_process->svc_access_mask.set();
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Kernel::g_current_process->address_mappings = default_address_mappings;
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Load3DSXFile(*file, Memory::EXEFS_CODE_VADDR);
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Load3DSXFile(*file, Memory::PROCESS_IMAGE_VADDR);
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Kernel::g_current_process->Run(Memory::EXEFS_CODE_VADDR, 48, Kernel::DEFAULT_STACK_SIZE);
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Kernel::g_current_process->Run(Memory::PROCESS_IMAGE_VADDR, 48, Kernel::DEFAULT_STACK_SIZE);
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is_loaded = true;
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return ResultStatus::Success;
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@ -355,7 +355,7 @@ ResultStatus AppLoader_ELF::Load() {
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Kernel::g_current_process->address_mappings = default_address_mappings;
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ElfReader elf_reader(&buffer[0]);
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elf_reader.LoadInto(Memory::EXEFS_CODE_VADDR);
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elf_reader.LoadInto(Memory::PROCESS_IMAGE_VADDR);
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// TODO: Fill application title
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Kernel::g_current_process->Run(elf_reader.GetEntryPoint(), 48, Kernel::DEFAULT_STACK_SIZE);
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@ -12,13 +12,12 @@
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namespace Memory {
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u8* g_exefs_code; ///< ExeFS:/.code is loaded here
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u8* g_system_mem; ///< System memory
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u8* g_heap; ///< Application heap (main memory)
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u8* g_heap_linear; ///< Linear heap
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u8* g_vram; ///< Video memory (VRAM) pointer
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u8* g_shared_mem; ///< Shared memory
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u8* g_dsp_mem; ///< DSP memory
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u8* g_kernel_mem; ///< Kernel memory
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u8* g_tls_mem; ///< TLS memory
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namespace {
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@ -29,14 +28,13 @@ struct MemoryArea {
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// We don't declare the IO regions in here since its handled by other means.
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static MemoryArea memory_areas[] = {
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{&g_exefs_code, EXEFS_CODE_SIZE },
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{&g_vram, VRAM_SIZE },
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{&g_heap, HEAP_SIZE },
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{&g_shared_mem, SHARED_MEMORY_SIZE},
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{&g_system_mem, SYSTEM_MEMORY_SIZE},
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{&g_dsp_mem, DSP_MEMORY_SIZE },
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{&g_kernel_mem, KERNEL_MEMORY_SIZE},
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{&g_heap_linear, HEAP_LINEAR_SIZE },
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{&g_exefs_code, PROCESS_IMAGE_MAX_SIZE},
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{&g_vram, VRAM_SIZE },
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{&g_heap, HEAP_SIZE },
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{&g_shared_mem, SHARED_MEMORY_SIZE },
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{&g_dsp_mem, DSP_RAM_SIZE },
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{&g_tls_mem, TLS_AREA_SIZE },
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{&g_heap_linear, LINEAR_HEAP_SIZE },
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};
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}
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@ -12,79 +12,93 @@ namespace Memory {
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const u32 PAGE_SIZE = 0x1000;
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enum : u32 {
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BOOTROM_SIZE = 0x00010000, ///< Bootrom (super secret code/data @ 0x8000) size
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BOOTROM_PADDR = 0x00000000, ///< Bootrom physical address
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BOOTROM_PADDR_END = (BOOTROM_PADDR + BOOTROM_SIZE),
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/// Physical memory regions as seen from the ARM11
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enum : PAddr {
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/// IO register area
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IO_AREA_PADDR = 0x10100000,
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IO_AREA_SIZE = 0x01000000, ///< IO area size (16MB)
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IO_AREA_PADDR_END = IO_AREA_PADDR + IO_AREA_SIZE,
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BOOTROM_MIRROR_SIZE = 0x00010000, ///< Bootrom Mirror size
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BOOTROM_MIRROR_PADDR = 0x00010000, ///< Bootrom Mirror physical address
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BOOTROM_MIRROR_PADDR_END = (BOOTROM_MIRROR_PADDR + BOOTROM_MIRROR_SIZE),
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/// MPCore internal memory region
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MPCORE_RAM_PADDR = 0x17E00000,
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MPCORE_RAM_SIZE = 0x00002000, ///< MPCore internal memory size (8KB)
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MPCORE_RAM_PADDR_END = MPCORE_RAM_PADDR + MPCORE_RAM_SIZE,
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MPCORE_PRIV_SIZE = 0x00002000, ///< MPCore private memory region size
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MPCORE_PRIV_PADDR = 0x17E00000, ///< MPCore private memory region physical address
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MPCORE_PRIV_PADDR_END = (MPCORE_PRIV_PADDR + MPCORE_PRIV_SIZE),
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/// Video memory
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VRAM_PADDR = 0x18000000,
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VRAM_SIZE = 0x00600000, ///< VRAM size (6MB)
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VRAM_PADDR_END = VRAM_PADDR + VRAM_SIZE,
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FCRAM_SIZE = 0x08000000, ///< FCRAM size
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FCRAM_PADDR = 0x20000000, ///< FCRAM physical address
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FCRAM_PADDR_END = (FCRAM_PADDR + FCRAM_SIZE),
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/// DSP memory
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DSP_RAM_PADDR = 0x1FF00000,
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DSP_RAM_SIZE = 0x00080000, ///< DSP memory size (512KB)
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DSP_RAM_PADDR_END = DSP_RAM_PADDR + DSP_RAM_SIZE,
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HEAP_SIZE = FCRAM_SIZE, ///< Application heap size
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HEAP_VADDR = 0x08000000,
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HEAP_VADDR_END = (HEAP_VADDR + HEAP_SIZE),
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/// AXI WRAM
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AXI_WRAM_PADDR = 0x1FF80000,
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AXI_WRAM_SIZE = 0x00080000, ///< AXI WRAM size (512KB)
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AXI_WRAM_PADDR_END = AXI_WRAM_PADDR + AXI_WRAM_SIZE,
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HEAP_LINEAR_SIZE = FCRAM_SIZE,
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HEAP_LINEAR_VADDR = 0x14000000,
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HEAP_LINEAR_VADDR_END = (HEAP_LINEAR_VADDR + HEAP_LINEAR_SIZE),
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/// Main FCRAM
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FCRAM_PADDR = 0x20000000,
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FCRAM_SIZE = 0x08000000, ///< FCRAM size (128MB)
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FCRAM_PADDR_END = FCRAM_PADDR + FCRAM_SIZE,
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};
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AXI_WRAM_SIZE = 0x00080000, ///< AXI WRAM size
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AXI_WRAM_PADDR = 0x1FF80000, ///< AXI WRAM physical address
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AXI_WRAM_PADDR_END = (AXI_WRAM_PADDR + AXI_WRAM_SIZE),
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/// Virtual user-space memory regions
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enum : VAddr {
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/// Where the application text, data and bss reside.
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PROCESS_IMAGE_VADDR = 0x00100000,
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PROCESS_IMAGE_MAX_SIZE = 0x03F00000,
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PROCESS_IMAGE_VADDR_END = PROCESS_IMAGE_VADDR + PROCESS_IMAGE_MAX_SIZE,
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SHARED_MEMORY_SIZE = 0x04000000, ///< Shared memory size
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SHARED_MEMORY_VADDR = 0x10000000, ///< Shared memory
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SHARED_MEMORY_VADDR_END = (SHARED_MEMORY_VADDR + SHARED_MEMORY_SIZE),
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/// Area where IPC buffers are mapped onto.
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IPC_MAPPING_VADDR = 0x04000000,
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IPC_MAPPING_SIZE = 0x04000000,
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IPC_MAPPING_VADDR_END = IPC_MAPPING_VADDR + IPC_MAPPING_SIZE,
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DSP_MEMORY_SIZE = 0x00080000, ///< DSP memory size
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DSP_MEMORY_VADDR = 0x1FF00000, ///< DSP memory virtual address
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DSP_MEMORY_VADDR_END = (DSP_MEMORY_VADDR + DSP_MEMORY_SIZE),
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/// Application heap (includes stack).
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HEAP_VADDR = 0x08000000,
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HEAP_SIZE = 0x08000000,
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HEAP_VADDR_END = HEAP_VADDR + HEAP_SIZE,
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CONFIG_MEMORY_SIZE = 0x00001000, ///< Configuration memory size
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CONFIG_MEMORY_VADDR = 0x1FF80000, ///< Configuration memory virtual address
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CONFIG_MEMORY_VADDR_END = (CONFIG_MEMORY_VADDR + CONFIG_MEMORY_SIZE),
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/// Area where shared memory buffers are mapped onto.
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SHARED_MEMORY_VADDR = 0x10000000,
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SHARED_MEMORY_SIZE = 0x04000000,
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SHARED_MEMORY_VADDR_END = SHARED_MEMORY_VADDR + SHARED_MEMORY_SIZE,
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SHARED_PAGE_SIZE = 0x00001000, ///< Shared page size
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SHARED_PAGE_VADDR = 0x1FF81000, ///< Shared page virtual address
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SHARED_PAGE_VADDR_END = (SHARED_PAGE_VADDR + SHARED_PAGE_SIZE),
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/// Maps 1:1 to an offset in FCRAM. Used for HW allocations that need to be linear in physical memory.
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LINEAR_HEAP_VADDR = 0x14000000,
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LINEAR_HEAP_SIZE = 0x08000000,
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LINEAR_HEAP_VADDR_END = LINEAR_HEAP_VADDR + LINEAR_HEAP_SIZE,
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KERNEL_MEMORY_SIZE = 0x00001000, ///< Kernel memory size
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KERNEL_MEMORY_VADDR = 0xFFFF0000, ///< Kernel memory where the kthread objects etc are
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KERNEL_MEMORY_VADDR_END = (KERNEL_MEMORY_VADDR + KERNEL_MEMORY_SIZE),
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/// Maps 1:1 to the IO register area.
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IO_AREA_VADDR = 0x1EC00000,
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IO_AREA_VADDR_END = IO_AREA_VADDR + IO_AREA_SIZE,
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EXEFS_CODE_SIZE = 0x03F00000,
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EXEFS_CODE_VADDR = 0x00100000, ///< ExeFS:/.code is loaded here
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EXEFS_CODE_VADDR_END = (EXEFS_CODE_VADDR + EXEFS_CODE_SIZE),
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/// Maps 1:1 to VRAM.
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VRAM_VADDR = 0x1F000000,
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VRAM_VADDR_END = VRAM_VADDR + VRAM_SIZE,
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// Region of FCRAM used by system
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SYSTEM_MEMORY_SIZE = 0x02C00000, ///< 44MB
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SYSTEM_MEMORY_VADDR = 0x04000000,
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SYSTEM_MEMORY_VADDR_END = (SYSTEM_MEMORY_VADDR + SYSTEM_MEMORY_SIZE),
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/// Maps 1:1 to DSP memory.
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DSP_RAM_VADDR = 0x1FF00000,
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DSP_RAM_VADDR_END = DSP_RAM_VADDR + DSP_RAM_SIZE,
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HARDWARE_IO_SIZE = 0x01000000,
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HARDWARE_IO_PADDR = 0x10000000, ///< IO physical address start
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HARDWARE_IO_VADDR = 0x1EC00000, ///< IO virtual address start
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HARDWARE_IO_PADDR_END = (HARDWARE_IO_PADDR + HARDWARE_IO_SIZE),
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HARDWARE_IO_VADDR_END = (HARDWARE_IO_VADDR + HARDWARE_IO_SIZE),
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/// Read-only page containing kernel and system configuration values.
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CONFIG_MEMORY_VADDR = 0x1FF80000,
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CONFIG_MEMORY_SIZE = 0x00001000,
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CONFIG_MEMORY_VADDR_END = CONFIG_MEMORY_VADDR + CONFIG_MEMORY_SIZE,
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VRAM_SIZE = 0x00600000,
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VRAM_PADDR = 0x18000000,
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VRAM_VADDR = 0x1F000000,
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VRAM_PADDR_END = (VRAM_PADDR + VRAM_SIZE),
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VRAM_VADDR_END = (VRAM_VADDR + VRAM_SIZE),
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/// Usually read-only page containing mostly values read from hardware.
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SHARED_PAGE_VADDR = 0x1FF81000,
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SHARED_PAGE_SIZE = 0x00001000,
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SHARED_PAGE_VADDR_END = SHARED_PAGE_VADDR + SHARED_PAGE_SIZE,
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SCRATCHPAD_SIZE = 0x00004000, ///< Typical stack size - TODO: Read from exheader
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SCRATCHPAD_VADDR_END = 0x10000000,
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SCRATCHPAD_VADDR = (SCRATCHPAD_VADDR_END - SCRATCHPAD_SIZE), ///< Stack space
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// TODO(yuriks): The exact location and size of this area is uncomfirmed.
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/// Area where TLS (Thread-Local Storage) buffers are allocated.
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TLS_AREA_VADDR = 0x1FFA0000,
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TLS_AREA_SIZE = 0x00002000, // Each TLS buffer is 0x200 bytes, allows for 16 threads
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TLS_AREA_VADDR_END = TLS_AREA_VADDR + TLS_AREA_SIZE,
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};
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////////////////////////////////////////////////////////////////////////////////////////////////////
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@ -111,9 +125,8 @@ extern u8* g_heap_linear; ///< Linear heap (main memory)
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extern u8* g_heap; ///< Application heap (main memory)
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extern u8* g_vram; ///< Video memory (VRAM)
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extern u8* g_shared_mem; ///< Shared memory
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extern u8* g_kernel_mem; ///< Kernel memory
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extern u8* g_tls_mem; ///< TLS memory
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extern u8* g_dsp_mem; ///< DSP memory
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extern u8* g_system_mem; ///< System memory
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extern u8* g_exefs_code; ///< ExeFS:/.code is loaded here
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void Init();
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@ -29,7 +29,7 @@ VAddr PhysicalToVirtualAddress(const PAddr addr) {
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} else if ((addr >= VRAM_PADDR) && (addr < VRAM_PADDR_END)) {
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return addr - VRAM_PADDR + VRAM_VADDR;
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} else if ((addr >= FCRAM_PADDR) && (addr < FCRAM_PADDR_END)) {
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return addr - FCRAM_PADDR + HEAP_LINEAR_VADDR;
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return addr - FCRAM_PADDR + LINEAR_HEAP_VADDR;
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}
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LOG_ERROR(HW_Memory, "Unknown physical address @ 0x%08x", addr);
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@ -46,8 +46,8 @@ PAddr VirtualToPhysicalAddress(const VAddr addr) {
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return 0;
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} else if ((addr >= VRAM_VADDR) && (addr < VRAM_VADDR_END)) {
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return addr - VRAM_VADDR + VRAM_PADDR;
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} else if ((addr >= HEAP_LINEAR_VADDR) && (addr < HEAP_LINEAR_VADDR_END)) {
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return addr - HEAP_LINEAR_VADDR + FCRAM_PADDR;
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} else if ((addr >= LINEAR_HEAP_VADDR) && (addr < LINEAR_HEAP_VADDR_END)) {
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return addr - LINEAR_HEAP_VADDR + FCRAM_PADDR;
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}
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LOG_ERROR(HW_Memory, "Unknown virtual address @ 0x%08x", addr);
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@ -61,16 +61,16 @@ inline void Read(T &var, const VAddr vaddr) {
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// Could just do a base-relative read, too.... TODO
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// Kernel memory command buffer
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if (vaddr >= KERNEL_MEMORY_VADDR && vaddr < KERNEL_MEMORY_VADDR_END) {
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var = *((const T*)&g_kernel_mem[vaddr - KERNEL_MEMORY_VADDR]);
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if (vaddr >= TLS_AREA_VADDR && vaddr < TLS_AREA_VADDR_END) {
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var = *((const T*)&g_tls_mem[vaddr - TLS_AREA_VADDR]);
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// ExeFS:/.code is loaded here
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} else if ((vaddr >= EXEFS_CODE_VADDR) && (vaddr < EXEFS_CODE_VADDR_END)) {
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var = *((const T*)&g_exefs_code[vaddr - EXEFS_CODE_VADDR]);
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} else if ((vaddr >= PROCESS_IMAGE_VADDR) && (vaddr < PROCESS_IMAGE_VADDR_END)) {
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var = *((const T*)&g_exefs_code[vaddr - PROCESS_IMAGE_VADDR]);
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// FCRAM - linear heap
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} else if ((vaddr >= HEAP_LINEAR_VADDR) && (vaddr < HEAP_LINEAR_VADDR_END)) {
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var = *((const T*)&g_heap_linear[vaddr - HEAP_LINEAR_VADDR]);
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} else if ((vaddr >= LINEAR_HEAP_VADDR) && (vaddr < LINEAR_HEAP_VADDR_END)) {
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var = *((const T*)&g_heap_linear[vaddr - LINEAR_HEAP_VADDR]);
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// FCRAM - application heap
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} else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) {
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@ -80,10 +80,6 @@ inline void Read(T &var, const VAddr vaddr) {
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} else if ((vaddr >= SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) {
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var = *((const T*)&g_shared_mem[vaddr - SHARED_MEMORY_VADDR]);
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// System memory
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} else if ((vaddr >= SYSTEM_MEMORY_VADDR) && (vaddr < SYSTEM_MEMORY_VADDR_END)) {
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var = *((const T*)&g_system_mem[vaddr - SYSTEM_MEMORY_VADDR]);
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// Config memory
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} else if ((vaddr >= CONFIG_MEMORY_VADDR) && (vaddr < CONFIG_MEMORY_VADDR_END)) {
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ConfigMem::Read<T>(var, vaddr);
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@ -93,8 +89,8 @@ inline void Read(T &var, const VAddr vaddr) {
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SharedPage::Read<T>(var, vaddr);
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// DSP memory
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} else if ((vaddr >= DSP_MEMORY_VADDR) && (vaddr < DSP_MEMORY_VADDR_END)) {
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var = *((const T*)&g_dsp_mem[vaddr - DSP_MEMORY_VADDR]);
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} else if ((vaddr >= DSP_RAM_VADDR) && (vaddr < DSP_RAM_VADDR_END)) {
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var = *((const T*)&g_dsp_mem[vaddr - DSP_RAM_VADDR]);
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// VRAM
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} else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) {
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@ -109,16 +105,16 @@ template <typename T>
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inline void Write(const VAddr vaddr, const T data) {
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// Kernel memory command buffer
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if (vaddr >= KERNEL_MEMORY_VADDR && vaddr < KERNEL_MEMORY_VADDR_END) {
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*(T*)&g_kernel_mem[vaddr - KERNEL_MEMORY_VADDR] = data;
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if (vaddr >= TLS_AREA_VADDR && vaddr < TLS_AREA_VADDR_END) {
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*(T*)&g_tls_mem[vaddr - TLS_AREA_VADDR] = data;
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// ExeFS:/.code is loaded here
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} else if ((vaddr >= EXEFS_CODE_VADDR) && (vaddr < EXEFS_CODE_VADDR_END)) {
|
||||
*(T*)&g_exefs_code[vaddr - EXEFS_CODE_VADDR] = data;
|
||||
} else if ((vaddr >= PROCESS_IMAGE_VADDR) && (vaddr < PROCESS_IMAGE_VADDR_END)) {
|
||||
*(T*)&g_exefs_code[vaddr - PROCESS_IMAGE_VADDR] = data;
|
||||
|
||||
// FCRAM - linear heap
|
||||
} else if ((vaddr >= HEAP_LINEAR_VADDR) && (vaddr < HEAP_LINEAR_VADDR_END)) {
|
||||
*(T*)&g_heap_linear[vaddr - HEAP_LINEAR_VADDR] = data;
|
||||
} else if ((vaddr >= LINEAR_HEAP_VADDR) && (vaddr < LINEAR_HEAP_VADDR_END)) {
|
||||
*(T*)&g_heap_linear[vaddr - LINEAR_HEAP_VADDR] = data;
|
||||
|
||||
// FCRAM - application heap
|
||||
} else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) {
|
||||
@ -128,17 +124,13 @@ inline void Write(const VAddr vaddr, const T data) {
|
||||
} else if ((vaddr >= SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) {
|
||||
*(T*)&g_shared_mem[vaddr - SHARED_MEMORY_VADDR] = data;
|
||||
|
||||
// System memory
|
||||
} else if ((vaddr >= SYSTEM_MEMORY_VADDR) && (vaddr < SYSTEM_MEMORY_VADDR_END)) {
|
||||
*(T*)&g_system_mem[vaddr - SYSTEM_MEMORY_VADDR] = data;
|
||||
|
||||
// VRAM
|
||||
} else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) {
|
||||
*(T*)&g_vram[vaddr - VRAM_VADDR] = data;
|
||||
|
||||
// DSP memory
|
||||
} else if ((vaddr >= DSP_MEMORY_VADDR) && (vaddr < DSP_MEMORY_VADDR_END)) {
|
||||
*(T*)&g_dsp_mem[vaddr - DSP_MEMORY_VADDR] = data;
|
||||
} else if ((vaddr >= DSP_RAM_VADDR) && (vaddr < DSP_RAM_VADDR_END)) {
|
||||
*(T*)&g_dsp_mem[vaddr - DSP_RAM_VADDR] = data;
|
||||
|
||||
//} else if ((vaddr & 0xFFFF0000) == 0x1FF80000) {
|
||||
// ASSERT_MSG(MEMMAP, false, "umimplemented write to Configuration Memory");
|
||||
@ -153,16 +145,16 @@ inline void Write(const VAddr vaddr, const T data) {
|
||||
|
||||
u8 *GetPointer(const VAddr vaddr) {
|
||||
// Kernel memory command buffer
|
||||
if (vaddr >= KERNEL_MEMORY_VADDR && vaddr < KERNEL_MEMORY_VADDR_END) {
|
||||
return g_kernel_mem + (vaddr - KERNEL_MEMORY_VADDR);
|
||||
if (vaddr >= TLS_AREA_VADDR && vaddr < TLS_AREA_VADDR_END) {
|
||||
return g_tls_mem + (vaddr - TLS_AREA_VADDR);
|
||||
|
||||
// ExeFS:/.code is loaded here
|
||||
} else if ((vaddr >= EXEFS_CODE_VADDR) && (vaddr < EXEFS_CODE_VADDR_END)) {
|
||||
return g_exefs_code + (vaddr - EXEFS_CODE_VADDR);
|
||||
} else if ((vaddr >= PROCESS_IMAGE_VADDR) && (vaddr < PROCESS_IMAGE_VADDR_END)) {
|
||||
return g_exefs_code + (vaddr - PROCESS_IMAGE_VADDR);
|
||||
|
||||
// FCRAM - linear heap
|
||||
} else if ((vaddr >= HEAP_LINEAR_VADDR) && (vaddr < HEAP_LINEAR_VADDR_END)) {
|
||||
return g_heap_linear + (vaddr - HEAP_LINEAR_VADDR);
|
||||
} else if ((vaddr >= LINEAR_HEAP_VADDR) && (vaddr < LINEAR_HEAP_VADDR_END)) {
|
||||
return g_heap_linear + (vaddr - LINEAR_HEAP_VADDR);
|
||||
|
||||
// FCRAM - application heap
|
||||
} else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) {
|
||||
@ -172,10 +164,6 @@ u8 *GetPointer(const VAddr vaddr) {
|
||||
} else if ((vaddr >= SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) {
|
||||
return g_shared_mem + (vaddr - SHARED_MEMORY_VADDR);
|
||||
|
||||
// System memory
|
||||
} else if ((vaddr >= SYSTEM_MEMORY_VADDR) && (vaddr < SYSTEM_MEMORY_VADDR_END)) {
|
||||
return g_system_mem + (vaddr - SYSTEM_MEMORY_VADDR);
|
||||
|
||||
// VRAM
|
||||
} else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) {
|
||||
return g_vram + (vaddr - VRAM_VADDR);
|
||||
@ -206,7 +194,7 @@ u32 MapBlock_Heap(u32 size, u32 operation, u32 permissions) {
|
||||
u32 MapBlock_HeapLinear(u32 size, u32 operation, u32 permissions) {
|
||||
MemoryBlock block;
|
||||
|
||||
block.base_address = HEAP_LINEAR_VADDR;
|
||||
block.base_address = LINEAR_HEAP_VADDR;
|
||||
block.size = size;
|
||||
block.operation = operation;
|
||||
block.permissions = permissions;
|
||||
|
@ -1003,7 +1003,7 @@ inline static u32 PAddrToVAddr(u32 addr) {
|
||||
if (addr >= Memory::VRAM_PADDR && addr < Memory::VRAM_PADDR + Memory::VRAM_SIZE) {
|
||||
return addr - Memory::VRAM_PADDR + Memory::VRAM_VADDR;
|
||||
} else if (addr >= Memory::FCRAM_PADDR && addr < Memory::FCRAM_PADDR + Memory::FCRAM_SIZE) {
|
||||
return addr - Memory::FCRAM_PADDR + Memory::HEAP_LINEAR_VADDR;
|
||||
return addr - Memory::FCRAM_PADDR + Memory::LINEAR_HEAP_VADDR;
|
||||
} else {
|
||||
return 0;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user